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More Example in Karnaugh Maps

The document discusses a 4 variable Karnaugh map example and provides the truth table. It then explains sum of products (SOP) and product of sums (POS) forms, providing an example of each. Finally, it covers canonical forms, minterms, maxterms, and provides an exercise asking to express a Boolean function in sum of minterms and product of maxterms.

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Renatus Katundu
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67 views27 pages

More Example in Karnaugh Maps

The document discusses a 4 variable Karnaugh map example and provides the truth table. It then explains sum of products (SOP) and product of sums (POS) forms, providing an example of each. Finally, it covers canonical forms, minterms, maxterms, and provides an exercise asking to express a Boolean function in sum of minterms and product of maxterms.

Uploaded by

Renatus Katundu
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PPT, PDF, TXT or read online on Scribd
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More example in Karnaugh

maps
 4 variables Karnaugh map
AB
CD 00 01 11 10
0 4 12 8
00
1 5 13 9
01
3 7 15 11
11

2 6 14 10
10
More example in Karnough Map
AC
A B C Y
0 0 0 1 AB
C 00 01 11 10
0 0 1 1
0 1 0 0 0 1 1 1
0 1 1 0
1 0 0 1 1 1 1
1 0 1 1
1 1 0 1
1 1 1 0 B
B  AC
POS and SOP

• When a Boolean function appears as a sum of several


product terms, it is said to be expressed as a sum of
products (SOP).

• When a Boolean function appears as a product of several


sum terms, it is said to be expressed as a product of
sums (POS).
POS andSOP

Example
• f(a,b,c,d)=b’.a+b.c’+c.d is an
expression in SOP form

• f(a,b,c,d)=(a+b).(b+c+d)
is an expression in POS form
Canonical Form of SOP and POS

• When each of the terms of a Boolean


functions expressed in either SOP or POS
form has all the variables in it is said to be
expressed in canonical form

• The canonical form cannot have the same


term more than once
Canonical form

Example

Express the following functions in


canonical forms

a) f(abc)=a.b’.c+b.c’+a.c

a) f(abc)=(a+b).(b+c’)
Canonical form of SOP and POS

Solution
a)f1=a.b’.c + b.c’ + a.c=
=a.b’.c+(a+a’).b.c’ + a.(b+b’).c=
=a.b’.c + a. b.c’ + a’.b.c’ + a.b.c
b)f2= (a+b)(b+c’)=
= (a+b+c.c’)(a.a’+b+c’)=
= (a+b+c).(a+b+c’).(a+b+c’).(a’+b+c’)=
= (a+b+c).(a+b+c’).(a’+b+c’)
Minterms and Maxterm

• A minterm is an expression that is 1


for exactly one set of input values

• A maxterm is an expression that is


0 for exactly one set of input values
Maxterms From Karnough Map
Exercise
Given the truth table, find the SOP and POS form.

A B C Y
0 0 0 0
0 0 1 0
0 1 0 0
0 1 1 1
1 0 0 1
1 0 1 1
1 1 0 1
1 1 1 1
Exercise
1. Example. Express the Boolean function F = x + y z as a sum of
minterms.

2. Example. Express the Boolean function F = x + y z as a product of


maxterms.
Combinational and Sequential Logic Circuits

Combinational Circuits
• A combinational circuit consists of logic
gates whose outputs, at any time, are
determined by combining the values of
the inputs.
• For n input variables, there are 2n
possible binary input combinations.
• For each binary combination of the
input variables, there is one possible
output
Combinational logic circuit

Combinational circuits have only input and


output :
• Output depends on input.
Example: AND,OR,NAND,NOR,XOR etc
Combinational Circuit
Hence, a combinational circuit can be described by:
• A truth table that lists the output values for each
combination of the input variables, or

• m Boolean functions, one for each output variable.


Combinational vs. Sequential
Circuits

Combinational circuits are memory-less.


Thus, the output value depends ONLY on the
current input values.
Sequential circuits consist of combinational logic
as well as memory elements (used to store certain
circuit states).
Outputs depend on BOTH current input values and
previous input/state values (kept in the storage
elements).
Combinational vs. Sequential
Circuits
Sequential Logic circuit
• Sequential logic circuits are those, whose output depends not
only on the present value of the input but also on previous
values of the input signal (history of values)

• This is in contrast to combinational circuits where output


depends only on the present values of the input, at any instant
of time
Sequential Logic Circuit
• Sequential logic devices have some sort of feedback,
where the output of some logic device is fed back to
the input of a logic device.

• A simple memory circuit constructed from a OR


gate is shown on Figure below.
Sequential Logic Circuit

• In this memory device, if A and Q are initially


at logic 0, then Q remains at logic 0

• However if A becomes a logic 1, then the


output Q will be logic 1 ever after, regardless
of any further changes in the input at A.
Sequential Logic Circuit

• Once Q = 1 has been written it can’t be changed back


but it can be read

• You may also think of this as a one time


programmable memory element.

• Not a very useful circuit arrangement but it gave us


our first exposure to positive feedback and memory.
Sequential Logic Circuit

• Flip flop are basic


building blocks in
the memory of
electronic devices.

• Flip flop is formed


using logic gates,
which are made of
transistors.

• Each flip flop can


store one bit of data
Set Reset (SR) Flip flop
 SR Flip-Flip Circuit and Symbol
Set Reset (SR) Flip Flop
 This sequential logic circuit is constructed with
NOR gates and it has inputs labelled R and
S which may assume the values 1 or 0
 An equivalent representation of the circuit is
shown below where the feedback loop is
clearly shown.
SR Flip Flop
 The outputs Q and Q' are complementary.
The function of the circuit is described by the
table below
• Function Table
• It represents the dynamics of
the system, not just the static
logic described in
combinational logic circuits
• Qn represents the current
state of the output and Qn-1
corresponds to the previous
state.
SR Flip Flop
 In order to understand the behavior of the
circuit let’s first consider the following scenario
st
 1 R = 0, S = 1.
 In this case the output of NOR gate GS must be 0
( Q' = 0).
 Now both inputs of gate GR are 0 and so the output of
GR must be 1.
 So Q = 1 and Q' = 0. this case we say that the flip-flop is
SET
SR Flip Flop
nd
 2 R = 1, S = 0.
 In this case the output of NOR gate GR must
be 0 (Q = 0).
 Now both inputs of gate GS are 0 and so the
output of S must be 1. So Q = 0 and Q' = 1.
 In this case we say that the flip-flop is RESET.
 When R changed from 0 to 1 the output was
RESET.
SR Flip Flop
rd
 3 R = 0, S = 0.
 In this case the output can be either 0 or 1.
 In fact the output in this case depends on its
previous value.
 To see this explicitly consider the sequence of
events.

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