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Computer Organization and Architecture: Central Processing Unit Computer Arithmetic

The document discusses computer arithmetic and organization. It covers: 1) The arithmetic logic unit (ALU) which performs calculations and how integers are represented in binary. It discusses sign-magnitude and two's complement representations. 2) How the ALU performs basic operations like addition, subtraction, multiplication and division on binary integers and floating point numbers. It involves concepts like partial products and booths algorithm. 3) Floating point number representation and the IEEE 754 standard which defines floating point formats used in computers. It describes how floating point addition, subtraction, multiplication and division are performed in hardware.

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Zersh Ethio
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39 views30 pages

Computer Organization and Architecture: Central Processing Unit Computer Arithmetic

The document discusses computer arithmetic and organization. It covers: 1) The arithmetic logic unit (ALU) which performs calculations and how integers are represented in binary. It discusses sign-magnitude and two's complement representations. 2) How the ALU performs basic operations like addition, subtraction, multiplication and division on binary integers and floating point numbers. It involves concepts like partial products and booths algorithm. 3) Floating point number representation and the IEEE 754 standard which defines floating point formats used in computers. It describes how floating point addition, subtraction, multiplication and division are performed in hardware.

Uploaded by

Zersh Ethio
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PPT, PDF, TXT or read online on Scribd
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Computer Organization

and Architecture

Central processing unit


Computer Arithmetic
Arithmetic & Logic Unit
• Does the calculations
• Everything else in the computer is there to
service this unit
• Handles integers
• May handle floating point (real) numbers
• May be separate FPU (maths co-processor)
• May be on chip separate FPU (486DX +)
ALU Inputs and Outputs
Integer Representation
• Only have 0 & 1 to represent everything
• Positive numbers stored in binary
– e.g. 41=00101001
• No minus sign
• No period
• Sign-Magnitude
• Two’s compliment
Sign-Magnitude
• Left most bit is sign bit
• 0 means positive
• 1 means negative
• +18 = 00010010
• -18 = 10010010
• Problems
– Need to consider both sign and magnitude in
arithmetic
– Two representations of zero (+0 and -0)
Two’s Compliment
• +3 = 00000011
• +2 = 00000010
• +1 = 00000001
• +0 = 00000000
• -1 = 11111111
• -2 = 11111110
• -3 = 11111101
Benefits
• One representation of zero
• Arithmetic works easily
• Negating is fairly easy
– 3 = 00000011
– Boolean complement gives 11111100
– Add 1 to LSB 11111101
Addition and Subtraction
• Normal binary addition
• Monitor sign bit for overflow
• Take twos compliment of substahend and add
to minuend
– i.e. a - b = a + (-b)
• So we only need addition and complement
circuits
Hardware for Addition and Subtraction
Multiplication
• Complex
• Work out partial product for each digit
• Take care with place value (column)
• Add partial products
Multiplication Example
• 1011 Multiplicand (11 dec)
• x 1101 Multiplier (13 dec)
• 1011 Partial products
• 0000 Note: if multiplier bit is 1 copy
• 1011 multiplicand (place value)
• 1011 otherwise zero
• 10001111 Product (143 dec)
• Note: need double length result
Unsigned Binary Multiplication
Execution - Example
Flowchart for Unsigned Binary
Multiplication
Multiplying Negative Numbers
• This does not work!
• Solution 1
– Convert to positive if required
– Multiply as above
– If signs were different, negate answer
• Solution 2
– Booth’s algorithm
Booth’s Algorithm
Example of Booth’s Algorithm
Division
• More complex than multiplication
• Negative numbers are really bad!
• Based on long division
Division of Unsigned Binary Integers

00001101 Quotient
Divisor 1011 10010011 Dividend
1011
001110
Partial 1011
Remainders
001111
1011
100 Remainder
Flowchart for Unsigned Binary Division
Real Numbers
• Numbers with fractions
• Could be done in pure binary
– 1001.1010 = 24 + 20 +2-1 + 2-3 =9.625
• Where is the binary point?
• Fixed?
– Very limited
• Moving?
– How do you show where it is?
Floating Point

• +/- .significand x 2exponent


• Misnomer
• Point is actually fixed between sign bit and body of mantissa
• Exponent indicates place value (point position)
Floating Point Examples
IEEE 754
• Standard for floating point storage
• 32 and 64 bit standards
• 8 and 11 bit exponent respectively
• Extended formats (both mantissa and
exponent) for intermediate results
IEEE 754 Formats
FP Arithmetic +/-
• Check for zeros
• Align significands (adjusting exponents)
• Add or subtract significands
• Normalize result
FP Addition & Subtraction Flowchart
FP Arithmetic x/
• Check for zero
• Add/subtract exponents
• Multiply/divide significands (watch sign)
• Normalize
• Round
• All intermediate results should be in double
length storage
Floating Point Multiplication
Floating Point Division

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