ECE FET Small Signal Analysis

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Chapter 9:

FET Small-Signal Analysis

Robert Boylestad Copyright ©2002 by Pearson Education, Inc.


Digital Electronics Upper Saddle River, New Jersey 07458
All rights reserved.
Slide 1 Introduction

FETs provide
• excellent voltage gain

• high input impedance

• low-power consumption

• good frequency range

Robert Boylestad Copyright ©2002 by Pearson Education, Inc.


Digital Electronics Upper Saddle River, New Jersey 07458
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Slide 2 FET Small-Signal Model

Transconductance

The relationship of VGS (input) to ID (output) is called transconductance.

The transconductance is denoted gm.

ID [Formula 9.2]
gm 
VGS

Robert Boylestad Copyright ©2002 by Pearson Education, Inc.


Digital Electronics Upper Saddle River, New Jersey 07458
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Slide 3 Graphical Determination of gm

Robert Boylestad Copyright ©2002 by Pearson Education, Inc.


Digital Electronics Upper Saddle River, New Jersey 07458
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Slide 4 Mathematical Definition of gm
ID
gm  [Formula 9.2]
VGS

2IDSS  VGS 
gm  1 [Formula 9.4]
VP  VP 
2IDSS
gm0 
gm for VGS =0V: VP [Formula 9.5]
 VGS  [Formula 9.6]
gm  gm0 1
 VP 
VGS ID
for 1  [Formula 9.8]
VP IDSS
VGS ID
gm  gm0 (1 )  gm0 [Formula 9.9]
VP IDSS

Robert Boylestad Copyright ©2002 by Pearson Education, Inc.


Digital Electronics Upper Saddle River, New Jersey 07458
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Slide 5 FET Impedance

Input Impedance Zi: Zi   [Formula 9.10]


1
Output Impedance Zo: Zo  rd  [Formula 9.11]
yos
VDS [Formula 9.12]
rd 
ID VGS  constant
yos: admittance equivalent circuit parameter listed on FET specification sheets.

Robert Boylestad Copyright ©2002 by Pearson Education, Inc.


Digital Electronics Upper Saddle River, New Jersey 07458
All rights reserved.
Slide 6 FET AC Equivalent Circuit

Robert Boylestad Copyright ©2002 by Pearson Education, Inc.


Digital Electronics Upper Saddle River, New Jersey 07458
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Slide 7 JFET Common-Source (CS) Fixed-Bias Configuration

The input is on the gate and the output is on the drain.


Robert Boylestad Copyright ©2002 by Pearson Education, Inc.
Digital Electronics Upper Saddle River, New Jersey 07458
All rights reserved.
Slide 8 AC Equivalent Circuit

Robert Boylestad Copyright ©2002 by Pearson Education, Inc.


Digital Electronics Upper Saddle River, New Jersey 07458
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Slide 9 Impedances

Input Impedance: Zi  RG [Formula 9.13]


Zo  RD || rd
Output Impedance: [Formula 9.14]
Zo  RD [Formula 9.15]
Robert Boylestad
rd 10RD Copyright ©2002 by Pearson Education, Inc.
Digital Electronics Upper Saddle River, New Jersey 07458
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Slide 10 Voltage Gain

Vo
Av   gm(rd || RD) [Formula 9.16]
Vi

Av 
Vo
 gmRD [Formula 9.17]
Vi rd 10RD

Robert Boylestad Copyright ©2002 by Pearson Education, Inc.


Digital Electronics Upper Saddle River, New Jersey 07458
All rights reserved.
Slide 11 Phase Relationship

A CS amplifier configuration has a 180-degree phase shift between input and output.

Robert Boylestad Copyright ©2002 by Pearson Education, Inc.


Digital Electronics Upper Saddle River, New Jersey 07458
All rights reserved.
Slide 12 JFET CS Self-Bias Configuration

This is a CS amplifier configuration therefore the input is on the gate and the output is on
the drain.
Robert Boylestad Copyright ©2002 by Pearson Education, Inc.
Digital Electronics Upper Saddle River, New Jersey 07458
All rights reserved.
Slide 13 AC Equivalent Circuit

Robert Boylestad Copyright ©2002 by Pearson Education, Inc.


Digital Electronics Upper Saddle River, New Jersey 07458
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Slide 14 Impedances

Input Impedance: Zi  RG [Formula 9.18]

Output Impedance: Zo  rd || RD [Formula 9.19]


Zo  RD
[Formula 9.20]
Robert Boylestad
Digital Electronics
rd 10RD Copyright ©2002 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458
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Slide 15 Voltage Gain

Av  gm(rd || RD)
[Formula 9.21]

Av  gmRD [Formula 9.22]


rd 10RD

Robert Boylestad Copyright ©2002 by Pearson Education, Inc.


Digital Electronics Upper Saddle River, New Jersey 07458
All rights reserved.
Slide 16 Phase Relationship

A CS amplifier configuration has a 180-degree phase shift between input and output.

Robert Boylestad Copyright ©2002 by Pearson Education, Inc.


Digital Electronics Upper Saddle River, New Jersey 07458
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Slide 17 JFET CS Self-Bias Configuration – Unbypassed Rs

If Cs is removed, it affects the gain of the circuit.


Robert Boylestad Copyright ©2002 by Pearson Education, Inc.
Digital Electronics Upper Saddle River, New Jersey 07458
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Slide 18 AC Equivalent Circuit

Robert Boylestad Copyright ©2002 by Pearson Education, Inc.


Digital Electronics Upper Saddle River, New Jersey 07458
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Slide 19 Impedances

Input Impedance: Zi  RG [Formula 9.23]

Output Impedance: Zo  RD [Formula 9.25(b)]


rd 10RD
Robert Boylestad Copyright ©2002 by Pearson Education, Inc.
Digital Electronics Upper Saddle River, New Jersey 07458
All rights reserved.
Slide 20 Voltage Gain

Vo gmRD
Av  
Vi RD  RS
1 gmRS 
rd
[Formula 9.26]
Vo gmRD
Av  
Vi 1 gmRS rd 10(RD  RS) [Formula 9.27]

Robert Boylestad Copyright ©2002 by Pearson Education, Inc.


Digital Electronics Upper Saddle River, New Jersey 07458
All rights reserved.
Slide 21 JFET CS Voltage-Divider Configuration

This is a CS amplifier configuration therefore the input is on the gate and the output is on
the drain.
Robert Boylestad Copyright ©2002 by Pearson Education, Inc.
Digital Electronics Upper Saddle River, New Jersey 07458
All rights reserved.
Slide 22 AC Equivalent Circuit

Robert Boylestad Copyright ©2002 by Pearson Education, Inc.


Digital Electronics Upper Saddle River, New Jersey 07458
All rights reserved.
Slide 23 Impedances

Zi  R1 || R2
Input Impedance: [Formula 9.28]

Output Impedance: Zo  rd || RD [Formula 9.29]


Zo  RD [Formula 9.30]
Robert Boylestad
rd 10RD
Copyright ©2002 by Pearson Education, Inc.
Digital Electronics Upper Saddle River, New Jersey 07458
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Slide 24 Voltage Gain

Av  gm(rd || RD) [Formula 9.31]

Av  gmRD [Formula 9.32]


rd 10RD

Robert Boylestad Copyright ©2002 by Pearson Education, Inc.


Digital Electronics Upper Saddle River, New Jersey 07458
All rights reserved.
Slide 25 JFET Source Follower
(Common-Drain) Configuration

In a CD amplifier configuration the input is on the gate, but the output is from the source.
Robert Boylestad Copyright ©2002 by Pearson Education, Inc.
Digital Electronics Upper Saddle River, New Jersey 07458
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Slide 26 AC Equivalent Circuit

Robert Boylestad Copyright ©2002 by Pearson Education, Inc.


Digital Electronics Upper Saddle River, New Jersey 07458
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Slide 27 Impedances

Input Impedance:
Zi  RG [Formula 9.33]
1
Zo  rd || RS ||
Output Impedance: gm [Formula 9.34]
1
Zo  RS || [Formula 9.35]
Robert Boylestad gm rd 10RS
Copyright ©2002 by Pearson Education, Inc.
Digital Electronics Upper Saddle River, New Jersey 07458
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Slide 28 Voltage Gain

Vo gm(rd || RS)
Av   [Formula 9.36]
Vi 1 gm(rd || RS)

Av 
Vo

gmRS [Formula 9.37]
Vi 1 gmRS rd 10RS

Robert Boylestad Copyright ©2002 by Pearson Education, Inc.


Digital Electronics Upper Saddle River, New Jersey 07458
All rights reserved.
Slide 29 Phase Relationship

A CD amplifier configuration has no phase shift between input and output.

Robert Boylestad Copyright ©2002 by Pearson Education, Inc.


Digital Electronics Upper Saddle River, New Jersey 07458
All rights reserved.
Slide 30 JFET Common-Gate Configuration

The input is on source and the output is on the drain.


Robert Boylestad Copyright ©2002 by Pearson Education, Inc.
Digital Electronics Upper Saddle River, New Jersey 07458
All rights reserved.
Slide 31 AC Equivalent Circuit

Robert Boylestad Copyright ©2002 by Pearson Education, Inc.


Digital Electronics Upper Saddle River, New Jersey 07458
All rights reserved.
Slide 32 Impedances

 rd  RD 
Zi  RS ||  
Input Impedance: 1 gmrd  [Formula 9.39]
Zi  RS || ( 1 ) [Formula 9.40]
gm rd 10RD

Output Impedance: Zo  RD || rd [Formula 9.41]


Zo  RD [Formula 9.42]
rd 10RD
Robert Boylestad Copyright ©2002 by Pearson Education, Inc.
Digital Electronics Upper Saddle River, New Jersey 07458
All rights reserved.
Slide 33 Voltage Gain
 RD 
g mRD 
Vo  rd  [Formula 9.43]
Av  
Vi  RD 
1 rd 
[Formula 9.44]
Av  gmRD
rd 10RD

Robert Boylestad Copyright ©2002 by Pearson Education, Inc.


Digital Electronics Upper Saddle River, New Jersey 07458
All rights reserved.
Slide 34 Phase Relationship

A CG amplifier configuration has no phase shift between input and output.

Robert Boylestad Copyright ©2002 by Pearson Education, Inc.


Digital Electronics Upper Saddle River, New Jersey 07458
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Slide 35 Depletion-Type MOSFETs

D-MOSFETs have similar AC equivalent models. The only difference is that VSGQ can be
positive for n-channel devices and negative for p-channel devices. This means that gm can
be greater than gm0.

Robert Boylestad Copyright ©2002 by Pearson Education, Inc.


Digital Electronics Upper Saddle River, New Jersey 07458
All rights reserved.
Slide 36 D-MOSFET AC Equivalent Model

[Fig. 9.34]

Robert Boylestad Copyright ©2002 by Pearson Education, Inc.


Digital Electronics Upper Saddle River, New Jersey 07458
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Slide 37 Enhancement-Type MOSFETs

There are two types of E-MOSFETs:

nMOS or n-channel MOSFETs


pMOS or p-channel MOSFETs

Robert Boylestad Copyright ©2002 by Pearson Education, Inc.


Digital Electronics Upper Saddle River, New Jersey 07458
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Slide 38 E-MOSFET AC Equivalent Model

gm and rd can be found in the specification sheet for the FET.


Robert Boylestad Copyright ©2002 by Pearson Education, Inc.
Digital Electronics Upper Saddle River, New Jersey 07458
All rights reserved.
Slide 39 E-MOSFET CS Drain-Feedback Configuration

Robert Boylestad Copyright ©2002 by Pearson Education, Inc.


Digital Electronics Upper Saddle River, New Jersey 07458
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Slide 40 AC Equivalent Circuit

Robert Boylestad Copyright ©2002 by Pearson Education, Inc.


Digital Electronics Upper Saddle River, New Jersey 07458
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Slide 41 Impedances

RF  rd || RD
Zi 
Input Impedance: 1 gm(rd || RD) [Formula 9.46]
Zi 
RF
RF  rd || RD, rd 10RD
[Formula 9.47]
1 gmRD

Zo  RF || rd || RD
Output Impedance: [Formula 9.48]
Zo  RD
RF  rd || RD, rd 10RD [Formula 9.49]
Robert Boylestad Copyright ©2002 by Pearson Education, Inc.
Digital Electronics Upper Saddle River, New Jersey 07458
All rights reserved.
Slide 42 Voltage Gain

Av  gm(RF || rd || RD) [Formula 9.50]

Av  gmRD [Formula 9.51]


RF  rd || RD, rd 10RD

Robert Boylestad Copyright ©2002 by Pearson Education, Inc.


Digital Electronics Upper Saddle River, New Jersey 07458
All rights reserved.
Slide 43 Phase Relationship

This is a CS amplifier configuration therefore it has 180-degree phase shift between input
and output.

Robert Boylestad Copyright ©2002 by Pearson Education, Inc.


Digital Electronics Upper Saddle River, New Jersey 07458
All rights reserved.
Slide 44 E-MOSFET CS Voltage-Divider Configuration

Robert Boylestad Copyright ©2002 by Pearson Education, Inc.


Digital Electronics Upper Saddle River, New Jersey 07458
All rights reserved.
Slide 45 AC Equivalent Circuit

Robert Boylestad Copyright ©2002 by Pearson Education, Inc.


Digital Electronics Upper Saddle River, New Jersey 07458
All rights reserved.
Slide 46 Impedances

Input Impedance: Zi  R1 || R2 [Formula 9.52]


Zo  rd || RD
Output Impedance: [Formula 9.53]
Zo  RD
rd 10RD [Formula 9.54]
Robert Boylestad Copyright ©2002 by Pearson Education, Inc.
Digital Electronics Upper Saddle River, New Jersey 07458
All rights reserved.
Slide 47 Voltage Gain

Av  gm(rd || RD) [Formula 9.55]

Av  gmRD [Formula 9.56]


rd 10RD

Robert Boylestad Copyright ©2002 by Pearson Education, Inc.


Digital Electronics Upper Saddle River, New Jersey 07458
All rights reserved.
Slide 48a Summary Table

Robert Boylestad Copyright ©2002 by Pearson Education, Inc.


Digital Electronics Upper Saddle River, New Jersey 07458
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Slide 48b Summary Table

Robert Boylestad Copyright ©2002 by Pearson Education, Inc.


Digital Electronics Upper Saddle River, New Jersey 07458
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Slide 49 Troubleshooting

1. Check the DC bias voltages – if not correct check power supply, resistors, FET. Also
check to ensure that the coupling capacitor between amplifier stages is OK.

2. Check the AC voltages – if not correct check FET, capacitors and the loading effect of
the next stage.

Robert Boylestad Copyright ©2002 by Pearson Education, Inc.


Digital Electronics Upper Saddle River, New Jersey 07458
All rights reserved.
Slide 50 Practical Applications

• Three-Channel Audio Mixer

• Silent Switching

• Phase Shift Networks

• Motion Detection System

Robert Boylestad Copyright ©2002 by Pearson Education, Inc.


Digital Electronics Upper Saddle River, New Jersey 07458
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