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Design and Fpga Implementation of Hamming Code Encoder and Decoder Under The Guidance of Asst - Professor Dr. K Rajendra Prasad

This document describes the design and FPGA implementation of a Hamming code encoder and decoder. It provides background on Hamming codes, which can detect and correct single bit errors. It then discusses implementing the encoder and decoder circuits on an FPGA using a hardware description language. The encoder generates parity bits from the input data bits to form a codeword. The decoder checks parity bits to locate errors. Simulation and synthesis results are provided, showing the encoder and decoder were successfully implemented on an FPGA and meet timing requirements. Applications of Hamming codes include computing, telecommunications, and error correction.

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230 views20 pages

Design and Fpga Implementation of Hamming Code Encoder and Decoder Under The Guidance of Asst - Professor Dr. K Rajendra Prasad

This document describes the design and FPGA implementation of a Hamming code encoder and decoder. It provides background on Hamming codes, which can detect and correct single bit errors. It then discusses implementing the encoder and decoder circuits on an FPGA using a hardware description language. The encoder generates parity bits from the input data bits to form a codeword. The decoder checks parity bits to locate errors. Simulation and synthesis results are provided, showing the encoder and decoder were successfully implemented on an FPGA and meet timing requirements. Applications of Hamming codes include computing, telecommunications, and error correction.

Uploaded by

palati shivani
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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DESIGN AND FPGA IMPLEMENTATION OF HAMMING CODE ENCODER AND

DECODER

UNDER THE GUIDANCE OF

ASST.PROFESSOR DR. K RAJENDRA PRASAD

BY
BATCH NO. - 14
M CHANDRAHAS REDDY (15J1A04F2)

MOHD ABDULLAH MAAZUDDIN (15J41A04F5)


P HRISHIKESHAVA REDDY(15J41A04G6)
CONTENTS

• INTRODUCTION
• HAMMING CODE
• FPG
• DESIGN IMPLEMENTATION OF FPGA
• HAMMING CODE ENCODER
• HAMMING CODE DECODER
• APPLICATIONS
• SIMULATION RESULTS
INTRODUCTION

• Error coding is considered as a method of detecting and correcting these errors to


ensure that the information is transferred intact from its source to its destination.
• There are various error correcting techniques to detect and correct the error.
• One of the popular technique based on forward error correction is Hamming Code.
HAMMING CODE

• A commonly known linear Block Code is the Hamming code.


• Hamming codes can detect and correct a single bit-error in a block of data.
• In these codes, every bit is included in a unique set of parity bits .
FPGA

• A Field-Programmable Gate Array (FPGA) is a semiconductor device that can be


configured by the customer or designer after manufacturing—hence the name "field-
programmable".
• FPGAs are programmed using a source code in a Hardware Description Language (HDL)
to specify how the chip will work .
DESIGN IMPLEMENTATION OF FPGA
HAMMING CODE ENCODER

• Data word is applied as an input in the encoder circuit which performs XOR operations
on the given data word and thus the required parity bits are generated from the parity
generator.
• Parity bits and data bits together form the code word.
• An encoder circuit of hamming code for 4 bit data word.
• Following this circuit pattern we can design an encoder circuit of hamming code for 8bit
data word and realized it by means of tanner EDA tools.
HAMMING CODE ENCODER CIRCUIT FOR 4 BIT
HAMMING CODE DECODER

• In the decoder circuit check bits are generated by the checker bit generator to check
the parity bits.
• These check bits locates the error in the code word by means of decoder circuit. The
Output of decoder enables a demultiplexer which are connected to the input code
words.
HAMMING CODE DECODER CIRCUIT FOR 4 BIT
APPLICATIONS

• Hamming codes are generally used in computing, telecommunication, and other applications
including data compression, and turbo codes .
• They are also used for low cost and low power applications.
ENCODER SIMULATION WAVEFORM
DECODER SIMULATION WAVEFORM
XDC FILE
ENCODER SYNTHESIS REPORT
DECODER SYNTHESIS REPORT
ENCODER TIMING SUMMARY
DECODER TIMING SUMMARY
FPGA RESULTS
THANK YOU

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