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The document discusses the basic components and functions of a computer system. It describes how a program is a sequence of steps and operations that require different control signals. The control unit provides codes to control arithmetic and logic operations. The CPU consists of the control unit and arithmetic logic unit. Memory is needed to store instructions and results temporarily. The basic components of a computer system are described as the CPU, memory, and input/output. The document then explains the fetch-execute instruction cycle and how interrupts can improve efficiency by allowing other processes like I/O to run concurrently. It provides examples of program execution and describes how multiple interrupts of different priorities can be handled.

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Jaswanth Vemula
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44 views31 pages

Bsjdds

The document discusses the basic components and functions of a computer system. It describes how a program is a sequence of steps and operations that require different control signals. The control unit provides codes to control arithmetic and logic operations. The CPU consists of the control unit and arithmetic logic unit. Memory is needed to store instructions and results temporarily. The basic components of a computer system are described as the CPU, memory, and input/output. The document then explains the fetch-execute instruction cycle and how interrupts can improve efficiency by allowing other processes like I/O to run concurrently. It provides examples of program execution and describes how multiple interrupts of different priorities can be handled.

Uploaded by

Jaswanth Vemula
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PPTX, PDF, TXT or read online on Scribd
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Computer Function

What is a program?

 A sequence of steps
 For each step, an arithmetic or logical operation
is done
 For each operation, a different set of control
signals is needed
Function of Control Unit
 For each operation a unique code is provided
◦ e.g. ADD, MOVE
 A hardware segment accepts the code and issues the
control signals
Components
 The Control Unit and the Arithmetic and Logic Unit
constitute the Central Processing Unit
 Data and instructions need to get into the system and
results out
◦ Input/output
 Temporary storage of code and results is needed
◦ Main memory
Computer Components: Top Level View
Instruction Cycle
 The processing required for a single instruction is
known as instruction cycle.
 Two steps:
◦ Fetch
◦ Execute
Fetch Cycle
 Program Counter (PC) holds address of next instruction
to fetch
 Processor fetches instruction from memory location
pointed to by PC
 Increment PC
◦ Unless told otherwise
 Instruction loaded into Instruction Register (IR)
 Processor interprets instruction and performs required
actions
Execute Cycle
 Processor-memory
◦ data transfer between CPU and main memory
 Processor I/O
◦ Data transfer between CPU and I/O module
 Data processing
◦ Some arithmetic or logical operation on data
 Control
◦ Alteration of sequence of operations
◦ e.g. the processor may fetch an instruction from
location 149,which specifies that the next instruction
be from locationb182.(so not to 150)
Example of Program Execution
 Consider a simple example using a hypothetical
machine that includes the characteristics listed in
Figure .
 The processor contains a single data register,
called an accumulator (AC).
 Both instructions and data are 16 bits long.
 Thus, it is convenient to organize memory using
16-bit words.
 The instruction format provides 4 bits for the
opcode, so that there can be as many as 24 = 16
different opcodes, and up to 212 = 4096 (4K)
words of memory can be directly addressed.
Example of Program Execution
Example of Program Execution
Instruction Cycle - State Diagram
 Instruction address calculation (iac): Determine the
address of the next instruction to be executed. Usually,
this involves adding a fixed number to the address of the
previous instruction.
◦ For example, if each instruction is 16 bits long and memory is
organized into 16-bit words, then add 1 to the previous address.
If, instead, memory is organized as individually addressable 8-bit
bytes, then add 2 to the previous address.

 Instruction fetch (if): Read instruction from its memory


location into the processor.

 Instruction operation decoding (iod): Analyze


instruction to determine type of operation to be
performed and operand(s) to be used.
 Operand address calculation (oac): If the
operation involves reference to an operand in
memory or available via I/O, then determine the
address of the operand.
 Operand fetch (of): Fetch the operand from
memory or read it in from I/O.
 Data operation (do): Perform the operation
indicated in the instruction.
 Operand store (os): Write the result into
memory or out to I/O.
Interrupts

 Mechanism by which other modules (e.g. I/O) may interrupt


normal sequence of processing
 Program
◦ e.g. overflow, division by zero
 Timer
◦ Generated by internal processor timer
 I/O
◦ from I/O controller
 Hardware failure
◦ e.g. Power failure
 Interrupts are provided primarily as a way to
improve processing efficiency.
 For example, most external devices are much
slower than the processor.
 Suppose that the processor is transferring data to
a printer
 After each write operation, the processor must
pause and remain idle until the printer catches up.
 The length of this pause may be on the order of
many hundreds or even thousands of instruction
cycles that do not involve memory.
 Clearly, this is a very wasteful use of the
processor.
Program Flow Control
 The user program performs a series of WRITE calls interleaved
with processing.
 Code segments 1, 2, and 3 refer to sequences of instructions that
do not involve I/O.
 The WRITE calls are to an I/O program that is a system utility and
that will perform the actual I/O operation.
 The I/O program consists of three sections.
 A sequence of instructions, labeled 4 in the figure, to prepare for
the actual I/O operation. This may include copying the data to be
output into a special buffer and preparing the parameters for a
device command.
 The actual I/O command. Without the use of interrupts, once this
command is issued, the program must wait for the I/O device to
perform the requested function (or periodically poll the device).
The program might wait by simply repeatedly performing a test
operation to determine if the I/O operation is done.
 A sequence of instructions, labeled 5 in the figure, to complete the
operation. This may include setting a flag indicating the success or
failure of the operation.
 With interrupts, the processor can be engaged in
executing other instructions while an I/O operation is
in progress.
 The user program reaches a point at which it makes a
system call in the form of a WRITE call.
 The I/O program that is invoked in this case consists
only of the preparation code and the actual I/O
command.
 After these few instructions have been executed,
control returns to the user program.
 Meanwhile, the external device is busy accepting data
from computer memory and printing it.
 This I/O operation is conducted concurrently with
the execution of instructions in the user program.
 When the external device becomes ready to
be serviced—that is, when it is ready to
accept more data from the processor—the
I/O module for that external device sends an
interrupt request signal to the processor.

 The processor responds by suspending


operation of the current program, branching
off to a program to service that particular
I/O device, known as an interrupt handler,
and resuming the original execution
after the device is serviced.
Interrupt Cycle
 Added to instruction cycle
 Processor checks for interrupt
◦ Indicated by an interrupt signal
 If no interrupt, fetch next instruction
 If interrupt pending:
◦ Suspend execution of current program
◦ Save context
◦ Set PC to start address of interrupt handler routine
◦ Process interrupt
◦ Restore context and continue interrupted program
Transfer of Control via Interrupts
Instruction Cycle with Interrupts
Program Timing Short I/O Wait
Program Timing Long I/O Wait
Instruction Cycle (with Interrupts) - State Diagram
Multiple Interrupts

 Disable interrupts
◦ Processor will ignore further interrupts whilst
processing one interrupt
◦ Interrupts remain pending and are checked after first
interrupt has been processed
◦ Interrupts handled in sequence as they occur
 Define priorities
◦ Low priority interrupts can be interrupted by higher
priority interrupts
◦ When higher priority interrupt has been processed,
processor returns to previous interrupt
Multiple Interrupts - Sequential
Multiple Interrupts – Nested
 consider a system with three I/O devices: a printer, a disk, and a
communications line, with increasing priorities of 2, 4, and 5, respectively.
 A user program begins at t = 0. At t = 10, a printer interrupt occurs; user
information is placed on the system stack and execution continues at the
printer interrupt service routine (ISR).
 While this routine is still executing, at t = 15, a communications interrupt
occurs. Because the communications line has higher priority than the
printer, the interrupt is honored.
 The printer ISR is interrupted, its state is pushed onto the stack, and
execution continues at the communications ISR.
 While this routine is executing, a disk interrupt occurs (t = 20). Because
this interrupt is of lower priority, it is simply held, and the communications
ISR runs to completion.
 When the communications ISR is complete (t = 25), the previous processor
state is restored, which is the execution of the printer ISR.
 However, before even a single instruction in that routine can be executed,
the processor honors the higher priority disk interrupt and control transfers
to the disk ISR.
 Only when that routine is complete (t = 35) is the printer ISR resumed.
When that routine completes (t = 40), control finally returns to the user
program.
Time Sequence of Multiple Interrupts

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