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ROBA

This document presents a rounding-base approximate multiplier that aims to improve speed and energy efficiency for digital signal processing. The key aspects are: 1) It proposes rounding the operands to the nearest power-of-two to simplify and omit the intensive multiplication process, improving efficiency at the cost of small error. 2) It describes applying this approach to both signed and unsigned multiplications through different hardware architectures. 3) The contributions are a new scheme modifying the conventional multiplication approach and describing architectures for approximate signed and unsigned multiplications.

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Jyothi
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67% found this document useful (3 votes)
880 views11 pages

ROBA

This document presents a rounding-base approximate multiplier that aims to improve speed and energy efficiency for digital signal processing. The key aspects are: 1) It proposes rounding the operands to the nearest power-of-two to simplify and omit the intensive multiplication process, improving efficiency at the cost of small error. 2) It describes applying this approach to both signed and unsigned multiplications through different hardware architectures. 3) The contributions are a new scheme modifying the conventional multiplication approach and describing architectures for approximate signed and unsigned multiplications.

Uploaded by

Jyothi
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
You are on page 1/ 11

A Rounding-Base Approximate Multiplier For High-Speed Yet Energy-

Efficient Digital Signal Processing

PRESENTED BY: PROJECT GUIDE:


B. Jyothi (15F21A0445) K.K. Gouse,M.tech,MIE
H. Afrin (15F21A0401) Assistant professor
A .Kavya (15F21A0449)
S. Jagadiesh (15F21AO440)

DEPARMENT OF ELECTRONICS AND COMMUN ICATION ENGINEERING


GATES INSTITUTE OF TECHNOLOGY, GOOTY
CONTENTS:

• Abstract
• Introduction
• Existing method
• Proposed method
• Block Diagram
• Contribution
• Advantages and Applications of Proposed method
• System configuration
ABSTRACT

 we propose an approximate multiplier that is high speed yet energy


efficient.
 The approach is to round the operands to the nearest exponent of two.
 This intensive part of the multiplication is omitted improving speed and
energy consumption at the price of a small error.
 The proposed approach is applicable to both signed and unsigned
multiplications
INTRODUCTION
 Energy minimization is one of the main design requirements in almost any electronic
systems
 Digital signal processing (DSP) blocks are key components of these portable devices for
realizing various multimedia applications.
 The computational core of these blocks is the arithmetic logic unit where multiplications
have the greatest share among all arithmetic operations performed in these DSP systems
 Therefore, improving the speed and power/energy-efficiency characteristics of multipliers
plays a key role in improving the efficiency of processors.
EXISTING METHOD:
 An approximate multiplier and an approximate adder based on a
technique named broken-array multiplier (BAM) were proposed.
 By applying the BAM approximation method to the conventional modified
Booth multiplier, an approximate signed Booth multiplier was presented.
PROPOSED METHOD:

 In this Project, we propose performing the approximate multiplication through


simplifying the operation.
 The difference between our work is that, although the principles in both works are
almost similar for unsigned numbers, the mean error of our proposed approach is
smaller.
 In addition, we suggest some approximation techniques when the multiplication is
performed for signed numbers.
 Multiplication base on
 A × B ∼= Ar × B + Br × A − Ar × Br .
 Ar × Br , Ar×B, and Br×A may be implemented just by the shift operation.
Block Diagram
CONTRIBUTIONS
The contributions of this paper can be summarized as follows:
 1) presenting a new scheme for ROBA multiplication by modifying the
conventional multiplication approach.
 2) describing three hardware architectures of the proposed approximate
multiplication scheme for sign and unsigned operations.
Advantages and Applications of Proposed method
: tablets,

smart phones,
System configuration:

 Operating System : Windows95/98/2000/XP/Windows7


 Front End : XILINX TOOL

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