Differential and Multistage Amplifiers
Differential and Multistage Amplifiers
1
Introduction
Why differential ?
2
Introduction
Figure 3 (a) Noise of Supply Voltage at single MOS (b) Noise at Differential MOS.
3
7.1 The MOS Differential Pair
7.1.1 Operation with a Common-Mode Input Voltage
2 2 L
vs vCM VGS
I
vD1 vD 2 VDD RD
2
Figure 4 The MOS differential pair with a common-mode input voltage vCM .
4
7.1 The MOS Differential Pair
7.1.2 Operation with a Differential Input Voltage
setting vG 2 0
vid vGS 1 vGS 2
If vid 0, vGS 1 vGS 2 , iD1 iD 2 , vD1 vD 2
vid 0, vGS 1 vGS 2 , iD1 iD 2 , vD1 vD 2
Differential input signals make the differential output.
when iD1 I iD 2 0
vGS 2 Vt Assumed, Q1 and Q2 are in saturation
vG vS 2 Vt
vS 2 vs Vt
1 W
I iD1 nCox vGS 1 Vt
2
Figure 5 The MOS differential pair with differential input signal.
2 L
vid max vGS 1 vS vGS 1 Vt 2 I nCox W L
Vt 2 I nCox W L Vt
2 I nCox W L 5
7.1 The MOS Differential Pair
7.1.2 Operation with a Differential Input Voltage
when iD1 0 , iD 2 I
vid vGS 1 vs
Vt vs
1 W
I iD 2 nCox vGS 2 Vt
2
2 L
vGS 2 Vt 2 I nCox W L
vs Vt 2 I nCox W L
vs Vt 2 I nCox W L
6
7.1 The MOS Differential Pair
7.1.3 Large-Signal Operation 1 W
iD1 nCox vGS 1 Vt
2
2 L
1 W
nCox vGS 2 Vt
2
iD 2
2 L
1 W
iD1 nCox vGS 1 Vt
2 L
1 W
iD 2 nCox vGS 2 Vt
2 L
vGS 1 vGS 2 vG1 vG 2 vid
1 W
iD1 iD 2 nCox vid
2 L
1 W
Figure 6 The MOS differential pair for the purpose of deriving iD1 iD 2 2 iD1iD 2 nCox vid2
the transfer characteristics 2 L
iD1 iD 2 I
1 W
2 iD1iD 2 I nCox vid2
2 L
7
7.1 The MOS Differential Pair
7.1.3 Large-Signal Operation
1 W
2 iD1iD 2 I nCox vid2
2 L
iD 2 I iD1
1 W
2 iD1 I iD1 I nCox vid2
2 L
2
1 W W
4iD1 I iD1 I nCox vid4 I nCox vid2
2
4 L L
W 2
x iD1 , a I , b nCox
2
1 W W vid
4i 4iD1I I nCox vid4 I nCox vid2
2 2
D1
4 L L L
1
4 x 2 4ax a 2 b 2 ab
4
1
4 x 2 4ax a 2 ab b 2 0
4
1 1
x 2 ax a 2 ab b 2 0
4 4
1
a a 2 a 2 ab b 2
4
x
2
vid 2
2
I W v
1
ab b 2 iD1 nCox I id 1
a
x 4 2 L 2 I nCox
W
8
2 2 L
7.1 The MOS Differential Pair
7.1.3 Large-Signal Operation
vid 2
2
I W v
iD1 nCox I id 1
2 L 2 I nCox
W
L
iD1 iD 2 I
vid 2
2
I W v
iD 2 nCox I id 1
2 L 2 I nCox
W
L
At the bias point, vid 0
I
iD1 iD 2
2
vGS 1 vGS 2 VGS I I v v 2
2
iD1 id 1 id
I 1 W 2 2 VOV VOV
nCox VOV
2
2 2 L 2
I I v v 2
I iD 2 id 1 id
VOV 2 2 VOV VOV
W
nCox
L
9
7.1 The MOS Differential Pair
7.1.3 Large-Signal Operation
iD1, D 2 vid
Normalized plot vs
I VOV
vid2 is nonlinear term
vid2 should be as small as possible
2
I I v v 2
iD1 id 1 id
2 2 VOV VOV
I I v v 2
2
iD1 iD 2 I
iD 2 id 1 id
2 2 VOV VOV
vid
Setting VOV
2
I I v
iD1 id
2 2 VOV
I I vid
iD 2
2 2 VOV
Figure 7 Normalized plots of the currents in a MOSFET differential pair. 10