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Documentation Standards: - Block Diagrams - Schematic Diagrams - Timing Diagrams - Circuit Descriptions

The document discusses various documentation standards used in digital design projects, including block diagrams, schematic diagrams, and timing diagrams. It provides details on how to properly document schematic diagrams with designators, pin numbers, and signal names. Additionally, it covers topics such as logic diagrams, flat versus hierarchical schematic structures, gate symbols, programmable logic arrays, programmable array logic, decoders, and their applications in areas like memory systems and instruction decoding.

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Yunus Torun
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30 views29 pages

Documentation Standards: - Block Diagrams - Schematic Diagrams - Timing Diagrams - Circuit Descriptions

The document discusses various documentation standards used in digital design projects, including block diagrams, schematic diagrams, and timing diagrams. It provides details on how to properly document schematic diagrams with designators, pin numbers, and signal names. Additionally, it covers topics such as logic diagrams, flat versus hierarchical schematic structures, gate symbols, programmable logic arrays, programmable array logic, decoders, and their applications in areas like memory systems and instruction decoding.

Uploaded by

Yunus Torun
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPT, PDF, TXT or read online on Scribd
You are on page 1/ 29

Documentation Standards

• Block diagrams
– first step in hierarchical design
• Schematic diagrams
• Timing diagrams
• Circuit descriptions

1
Block Diagram
r a digital design project
2
Schematic diagrams
• Details of component inputs, outputs,
and interconnections
• Reference designators
• Pin numbers
• Title blocks
• Names for all signals
• Page-to-page connectors

Logic diagram: An informal drawing that does not have


Quite this level of details.

3
Example schematic

4
Flat schematic structure

5
Hierarchich
al
schematic
structure

6
Gate symbols

7
DeMorgan equivalent symbols

Which symbol to use?

Answer depends on
signal names and active levels.

8
Signal names and active
levels
• Signal names are chosen to be
descriptive.
• Active levels -- HIGH or LOW
– named condition or action occurs in
either the HIGH or the LOW state,
according to the active-level designation
in the name.

9
Example

HIGH when error occurs


Logic ERROR
Circuit OK_L

LOW when error occurs

Logic ERROR_L ERROR


Circuit

ERROR1_L

10
Programmable Logic Arrays
(PLAs)
• Any combinational logic function can
be realized as a sum of products.
• Idea: Build a large AND-OR array with
lots of inputs and product terms, and
programmable connections.
– n inputs
• AND gates have 2n inputs -- true and
complement of each variable.
– m outputs, driven by large OR gates
• Each AND gate is programmable connected to
each output’s OR gate.
– p AND gates (p<<2n)

11
Example: 4x3 PLA, 6 product
terms

12
Compact representation

• Actually, closer to physical layout (“wired


logic”).
13
Some product terms

14
PLA Electrical Design
• See Section 5.3.5 -- wired-AND logic

15
Programmable Array Logic
(PALs)
• How beneficial is product sharing?
– Not enough to justify the extra AND array
• PALs ==> fixed OR array
– Each AND gate is permanently connected
to a certain OR gate.
• Example: PAL16L8

16
• 10 primary inputs
• 8 outputs, with 7 ANDs
per output
• 1 AND for 3-state enable
• 6 outputs available as
inputs
– more inputs, at expense of
outputs
– two-pass logic, helper
terms
• Note inversion on
outputs
– output is complement of
sum-of-products
– newer PALs have
selectable inversion

17
Decoders
• General decoder structure

• Typically n inputs, 2n outputs


– 2-to-4, 3-to-8, 4-to-16, etc.

18
Binary 2-to-4 decoder

Note “x” (don’t care) notation.

19
2-to-4-decoder logic diagram

20
MSI 2-to-4 decoder

• Input buffering (less load)


• NAND gates (faster)

21
Decoder Symbol

22
Complete 74x139 Decoder

23
More decoder symbols

24
3-to-8
decoder

25
74x138 3-to-8-decoder symbol

26
Decoder
cascadi
ng

4-to-16 decoder

27
More
cascadi
ng

5-to-32 decoder

28
Decoder applications
• Microprocessor memory systems
– selecting different banks of memory
• Microprocessor input/output systems
– selecting different devices
• Microprocessor instruction decoding
– enabling different functional units
• Memory chips
– enabling different rows of memory
depending on address
• Lots of other applications

29

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