Classification of Embedded Systems Three Types of Embedded Systems Are

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Classification of Embedded Systems

Three Types of Embedded Systems are :

(1) Small Scale


(2) Medium Scale
(3) Sophisticated
Small Scale Embedded Systems
 Designed with a single 8 or 16 bit µC.
 Little Hardware & Software
complexities.
 Involves Board level design.
 May be Battery Operated.
 Programming Tools Needed:
Editor, Assembler, Cross Assembler
specific to µC or µP used.
Medium Scale Embedded Systems
 Designed with Single or a few 16-32 Bit
µC or DSP or RISC Computer,
 Hardware & Software Complexities
 Programming Tools: RTOS, Source Code
Engg. Tools, Simulator, Debugger, IDE.
 May employ readily available ASSP and
IP for various functions*
Sophisticated Embedded Systems
 Have enormous H/W and S/W complexities, may need
scalable or configurable processors and PLA
 Used for cutting edge application that needs H/W &
S/W Co-design and integration in final system
 Constrained by processing speed available in their
Hardware
 Certain S/W functions implemented in H/W* to obtain
additional speed by saving execution time.
 Development Tools for such systems may not be
readily available at a reasonable cost or may not be
available at all
Processor Types Used in New
Embedded Designs
60.0%

50.0%
1 9 9 8 -1 9 9 9
1999-2000
40.0%

30.0%

20.0%

10.0%

0.0%
4-bit 8-bit 16-bit 32-bit 64-bit Special
Selection of a Processor
 Instruction Set, Pipelining, Super Scalar
Execution.
 Data Bus Width (8-16-32 Bits) for Arithmetic.
 Floating Point Coprocessor, Cache Memory
 On-chip peripheral devices, Clock Frequency,
 Availability of Retarget-able Compiler and
Hardware Software Co-design Tools
 Power Saving Modes available
 Cost [Components, Development tools, NRE ]
Types of Processors used in Emb.
Systems
 General Purpose Processor (GPP):
 Microprocessor
 Micro-controller
 Digital Signal Processor
 Embedded Processor
 Application Specific System Processor
(ASSP)
 Multiprocessor Systems using GPP
 Application Specific Instruction Processor
(ASIP)
Microprocessor (µP):

 Single VLSI Chip having CPU and (may have)


Cache memory, Floating point Arithmetic
Coprocessor, Pipelining Architecture to
process instructions faster.
 CPU Instruction Set supports ALU operations,
Data Transfer and Stack operations, Input
and Output, Program Control, Sequencing
and Supervisory operations
 Software located in external memory Chips
Examples- Microprocessors

Intel 8085 8 Bit Simple control


Intel 8086/ 88 16 bit Applications

Intel 80386 32 bit Graphics Accelerator,


Intel 80486 Network Interface
card
Pentium 64 bit Encryption Engine
with 0.464 Gbps data
rate
PowerPC 32 Bit Floating Pt
MPC 823 Coprocessor, USB,
IrDA,
Microcontrollers
 Contains ROM, RAM Memories on Chip
 Enhanced Input Output capabilities
 Limited Computational Abilities
 More Functional Units on Chip:
Timers, Watchdog Timer, Interrupt
Controller, UART, Parallel I/O Ports,
A/D Converter and
PWM Circuit for D/A converters
Functional Circuits in a Chip or Core of Microcontroller

ROM/ EPROM I/O Ports


Processor Controls and
Interfaces
External Memory
Data
Interface
and
Stack Serial UART
RAM Interrupt
Controller

Timers A/D Converter


Watchdog
Timer
PWM for D/A
Microcontroller Examples
68HC11, Motorola CISC
HC12
8051, 80251 Intel CISC
80186, Intel CISC
80386
PIC 16F84, Microchip CISC
PIC 16F876
Enhancemen TI CISC with
t of ARM7, RISC
ARM9
Embedded Processor
Specially designed µC / µP with:
(1) Fast Context Switching and thus lower latencies of
the task in complex real time applications
(2) Atomic ALU Operations and thus no shared data
problem
(3) RISC Core for fast, more precise and intensive
calculations by embedded software
 Needed in Real time Image processing
and Aerodynamics Applications
Examples- Embedded Processors
ARM 7 and Image Processing
ARM 9
Intel i960 4 Channel DMA
Controller
Digital Signal Processor
 Computational capabilities of a µP
 Has Multiply – Accumulate (MAC) Units
 Very Large Instruction Word
 Processes Single Instruction Multiple
Data(SIMD)
 Fast processing of Discrete Cosine
Transforms and Inverse (IDCT) algorithms
in Image Processing, Multimedia, Audio,
Video, HDTV, DSP Modems and Telecom
Processing Systems
Examples - DSP
TMS 320C6211 Texas Instruments

SHARC Analog Devices

5600xx Motorola
Application Specific System
Processor (ASSP)
 Dedicated to perform specific tasks in H/W
Like
 Provides Faster Solution using a single Chip
 Configured & Interfaced with the rest of ES.

Target Application Examples:


 Video Compression & Decompression (MPEG)
 Encryption and Decryption Implementations
 Serial to Ethernet Converter Application
Compression & Decompression
Application

 in MPEG2 or MPEG4 Standards


 Compression of Video signal is done before
storing or transmitting. Decompression is
done before retrieving or receiving these
signals
 If embedded Software is run on GPP,
separate DSP(s) are required to achieve
real time processing. A single dedicated
ASSP processor provides a faster solution.
Encryption & Decryption Applications
 When 2 Systems needs data communications
on a common bus and protocol, Embedded
Software (with some RTOS feature) may take
longer time than a hardware based approach
 ASSP Processor (W3100) from i2Chip has, for
example TCP, UDP, IP, ARP, Ethernet 10/100
Media Access Control (MAC)
 Provides RTOS less, Internet Connectivity in
H/W 5 times faster than a GPP based software
solution
Serial to Ethernet Converter Application
 IIM 7100 processes data in Real Time
by hardware protocol stack

 Requires no change in Application


Firmware

 Provides economical and smallest


RTOS solution.
Multiple Processor System using GPP
 Multiple GPP are used in Mobile
Phone. Tasks performed are:
 Speech signal compression and coding
 Dialing
 Modulating & transmitting
 Demodulating and Receiving
 Signal decoding and Decompression
 interface to LCD display and Keypad
 SMS protocol based messaging and
displays
Multiple Processors in Video
Conferencing
 Image Pixels are just 144 x 176 as against 525 x
625 pixel in video picture on TV.
 30 Samples of Images have to be taken in a
second
 144 x 176 x 30 = 760320 Pixels per second are
to be processed by Compression before
transmission
 A single DSP does not suffice. Multiple DSP(s)
are needed to process images during Video
Conferencing in real time.
Application Specific Instruction
Processor-ASIP
 For many Applications, the GPP cores
may not suffice. For examples:
 Security Applications, Smart Cards,
 Video games, Palmtop computers,
 Cell phones, Mobile Internet,
 Satellite Missile Systems
 Gbps Transceivers and Gbps LAN
systems
Application Specific Instruction
Processor-ASIP
 ‘Special Processing Units’ needed in a VLSI
designed Circuit to function as a Processor,
called Application Specific Instruction
Processors (ASIP)
 Both the Configurable processor (FPGA cum
ASIP) and Non-configurable processors (DSP,
µP or µC) might be needed on a chip.
 Examples: (1) Cell phone
(2) ASIP for HDTV to process an image with
1920 x 1020 pixels on TV screen.

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