Unit - IV 8255 PPI: - Programmable Peripheral Interfacing
Unit - IV 8255 PPI: - Programmable Peripheral Interfacing
8255 PPI
- Programmable Peripheral
Interfacing
PPI cont…
Group A Group B
In mode 1:
-three ports are divided into two groups
-each group contains one 8-bit port and one 4-bit control/data
port
- 8-bit port can be either input or output and both latched
- 4-bit port used for control and status of 8-bit data port
Mode 1
Group A Group B
In mode 2
- only port A is used
- port A becomes an 8-bit bidirectional bus
- port C acts as control port (only pins PC3-PC7 are used)
Mode 2
8255 PPI
Port A $106C
Port B $106D
Port C $106E
8255 control register $106F
Block Diagram of 8255
Pin Diagram
Control word register :
Control register
7 6 5 4 3 2 1 0
D7 D6 D5 D4 D3 D2 D1 D0
Group B
Port C(L) – 1 Input
0 output
Port B – 1 Input 0 output
Mode select: 0 mode 0; 1 mode 1
Control word: Port A input and port B output and both port in mode 0
A B
7 6 5 4 3 2 1 0
1 0 0 1 x 0 0 x
Programming 8255
Mode 0:
— Ports A, B, and C can be individually programmed as input or output ports
— Port C is divided into two 4-bit ports which are independent from each other
Mode 1:
— Ports A and B are programmed as input or output ports
— Port C is used for handshaking
PA[7:0] PA[7:0]
PC4 STBA PC7 OBFA
PC5 IBFA PC6 ACKA
PC3 INTRA PC3 INTRA
8255 PB[7:0] 8255 PB[7:0]
PC2 STBB PC2 OBFB
PC1 IBFB PC1 ACKB
PC0 INTRB PC0 INTRB
PC6, 7 PC4, 5
Input Control signals:
Output Control Signals:
Programming 8255
Mode 2:
— Port A is programmed to be bi-directional
— Port C is for handshaking
— Port B can be either input or output in mode 0 or mode 1
PA[7:0]
PC7 OBFA
PC6 ACKA
PC4 STBA
8255 PC5 IBFA
PC3 INTRA
PC0 In Out STBB OBFB
PC0 In Out IBFB ACKB
PC0 In Out INTRB INTRB
PB[7:0]
Mode 0 Mode 1
1. Can you design a decoder for an 8255 chip such that its base address is 40H?
2. Write the instructions that set 8255 into mode 0, port A as input, port B as output,
PC0-PC3 as input, PC4-PC7 as output ?
Control signals:
Timing diagram is a combination of the Mode 1 Strobed Input
and Mode 1 Strobed Output Timing diagrams.
Interfacing 8255 to 8086 in I/O mapped I/O
D0-D7
D0-D7
Port A
A1 A0
A2 A1
Port B
M/IO RD Port C
RD
A0
WR
WR RST CS
A7
A6
A5
A4
A3
Interfacing 8255 to 8086 in Memory mapped I/O
D0-D7
D0-D7
Port A
A1 A0
A19 Port B
A2 A1
M/IO RD Port C
RD
A0
WR
WR RST CS
A7
A6
A5
A4
A3
Example Program
Write a program for this traffic signal problem.
Port A 0 -
8255- 1 R
MC68HC11-
2
3
+
4
based P 5
6 -
7 G
+
Summary