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Travis JF Flip-Flops

The document describes a JK flip-flop, which is a circuit that can store a binary 1 or 0 and change its state based on signals to its J, K, PR, CLR, and CLK inputs. It has two outputs, Q and Q', and its behavior is determined by the characteristic equation Q(t+1) = J.Q' + K'.Q. The four modes of operation are hold, set, reset, and toggle based on the signals to the J and K inputs.

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0% found this document useful (0 votes)
52 views18 pages

Travis JF Flip-Flops

The document describes a JK flip-flop, which is a circuit that can store a binary 1 or 0 and change its state based on signals to its J, K, PR, CLR, and CLK inputs. It has two outputs, Q and Q', and its behavior is determined by the characteristic equation Q(t+1) = J.Q' + K'.Q. The four modes of operation are hold, set, reset, and toggle based on the signals to the J and K inputs.

Uploaded by

Muhammad Zuhal
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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JK flip-flops

BY: TRAVIS HOOVER


2/22/2011
CS 147
DR. LEE
What is a JK Flip-flop?

 A flip-flop is a circuit that has two stable states and


can be used to store state information.

 The flip-flop can be made to change state by signals


applied to one or more control inputs and will have
one or two outputs.
JK Terminology/Structure

Has 5 inputs named:


J(set),K(reset), PR, CLR, and CLK

Has 2 outputs: Q and Q’

PR = Preset
CLR = Clear
CLK = Clock

Set: when it stores a binary 1


Cleared (reset): when it stores a binary 0
Outputs

The Q output is the primary output.


This means that the binary bit
stored in the flip-flop, 1 or 0, is
the same as Q.

The Q’ output is the


opposite binary bit value
that is stored in Q.

The PR and CLR inputs always


override the J,K inputs.
Inputs: PR and CLR

A low at the PR input sets Q = 1

A low at the CLR input sets Q = 0


Inputs: J and K

 The logic states applied to the J and K inputs cause the


flip-flop to operate 4 different ways.

 The way the logic state is applied to J and K is called


Mode of Operation.

 The mode of operation refers to the condition of the


flip-flop as it prepares for the positive clock pulse.
Four Modes Of Operation

The 4 modes of operation are:


hold, set, reset, toggle

J K Q Q’ Mode
0 0 Q Q’ Hold
1 0 1 0 Sets JK contains an internal
Active Low SR latch.
0 1 0 1 Resets
1 1 Q’ Q Toggle
Active Low SR Latch

Point to remember:

A ‘0’ at the set or the


reset will either set or
reset the value of Q.

S’ – “set” R’ – Q Q’
“reset”
0 0 Invalid Invalid
0 1 1 0
1 0 0 1
1 1 Q Q’
Review: Truth Table for NAND

2 Inputs: 3 Inputs:

A B X A B C X
0 0 1 0 0 0 1
0 1 1 0 0 1 1
1 0 1 0 1 0 1
1 1 0 0 1 1 1
1 0 0 1
1 0 1 1
1 1 0 1
1 1 1 0
Mode of Operation: Hold

Hold: no change in Q.

J K Q Q’ Orig. Q Orig. Q’
0 0 0 1 0 1
Mode of Operation: Set

Set: Q = 1.

J K Q Q’ Orig. Q Orig. Q’
1 0 1 0 0 1
Mode of Operation: Reset

Reset: Q = 0.

J K Q Q’ Orig. Q Orig. Q’
0 1 0 1 1 0
Mode of Operation: Toggle

Toggle: Q = Q’.

J K Q Q’ Orig. Q Orig. Q’
1 1 1 0 0 1
Mode of Operation: Toggle again

Toggle: Q = Q’.

J K Q Q’ Orig. Q Orig. Q’
1 1 0 1 1 0
Overview: During a time period
Characteristic Equation

Q J K Q(t + 1)
0 0 0 0
0 0 1 0
0 1 0 1
0 1 1 1
1 0 0 1
1 0 1 0
1 1 0 1 Characteristic Equation:
1 1 1 0 Q(t+1) = J.Q’+ K’.Q
If only one slide to remember…

Characteristic Equation:

Q(t+1) = J.Q’+ K’.Q

Q is the primary output.

J K Q Q’ Mode
0 0 Q Q’ Hold SR Latch:
1 0 1 0 Sets
A ‘0’ at the set or the
0 1 0 1 Resets
reset will either set or
1 1 Q’ Q Toggle reset the value of Q.
More information / Questions?

 http://www.wisc-online.com/objects/ViewObject.aspx?ID=DIG3303

 http://hyperphysics.phy-astr.gsu.edu/hbase/electronic/jkflipflop.html

 http://computer.howstuffworks.com/boolean5.htm

 http://www.youtube.com/watch?v=bN02shtPWuI

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