Number Representations and Basic Processor Architecture: Prof. Yusuf Leblebici Microelectronic Systems Laboratory (LSM)
Number Representations and Basic Processor Architecture: Prof. Yusuf Leblebici Microelectronic Systems Laboratory (LSM)
1
Number Representations
2
Number Representations
3
Number Representations
4
Number Representations
Two’s complement
5
Number Representations
One’s complement
6
Number Representations
7
Number Representations
8
Building Blocks of Processor Systems
MEM ORY
INPUT-OUTPUT
CONTROL
DATAPATH
CPU
9
Processor System Architecture
The typical processor system consists of:
CPU (central processing unit)
ALU (arithmetic-logic unit)
Control Logic
Registers, etc…
Memory
Input / Output interfaces
Interconnections between these units:
Address Bus
Data Bus
Control Bus
10
Bus and CPU
Bus: A shared group of wires used for communicating
signals among devices
• address bus: the device and the location within the
device that is being accessed
• data bus: the data value being communicated
• control bus: describes the action on the address and data
buses
• High-level language: a = b + c
• Assembly language: add r1 r2 r3
• Machine language: 0001001010111010101
11
Memory and I/O
Memory: Where instructions (programs) and data are stored
• Organized in arrays of locations (addresses), each storing
one byte (8 bits) in general
• A read operation to a particular location always returns the
last value stored in that location
12
8085 Microprocessor Architecture
Now we will examine these components more closely
by using the Intel 8085 microprocessor architecture
as an example:
13
The 8085 Bus Structure
The 8-bit 8085 CPU (or MPU – Micro Processing Unit)
communicates with the other units using a 16-bit address
bus, an 8-bit data bus and a control bus.
14
The 8085 Bus Structure
Address Bus
Consists of 16 address lines: A0 – A15
15
The 8085 Bus Structure
Data Bus
Consists of 8 data lines: D0 – D7
Control Bus
Consists of various lines carrying the control
signals such as read / write enable, flag bits.
16
The 8085: CPU Internal Structure
17
The 8085: CPU Internal Structure
18
The 8085: Registers
19
The 8085: CPU Internal Structure
Registers
Six general purpose 8-bit registers: B, C, D, E, H, L
They can also be combined as register pairs to
perform 16-bit operations: BC, DE, HL
Registers are programmable (data load, move, etc.)
Accumulator
Single 8-bit register that is part of the ALU !
Used for arithmetic / logic operations – the result is
always stored in the accumulator.
20
The 8085: CPU Internal Structure
Flag Bits
Indicate the result of condition tests.
Carry, Zero, Sign, Parity, etc.
Conditional operations (IF / THEN) are executed
based on the condition of these flag bits.
Program Counter (PC)
Contains the memory address (16 bits) of the
instruction that will be executed in the next step.
Stack Pointer (SP)
21
Example: Memory Read Operation
22
Example: Instruction Fetch Operation
23
Example: Instruction Fetch Operation
24
Example: Instruction Fetch Operation
25
8085 Functional Block Diagram
26