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Microprocessor Architecture and Its Operation

The microprocessor is a programmable device designed with registers, flip-flops, and timing elements. Its architecture determines how it performs data manipulation and communication through logic design. The microprocessor can perform internal operations like arithmetic, logical operations, and storing data, as well as input/output operations by communicating with peripherals through addressing and transferring data and timing signals. The 8085 is an 8-bit microprocessor that can address 64KB of memory and has 40 pins.

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52 views42 pages

Microprocessor Architecture and Its Operation

The microprocessor is a programmable device designed with registers, flip-flops, and timing elements. Its architecture determines how it performs data manipulation and communication through logic design. The microprocessor can perform internal operations like arithmetic, logical operations, and storing data, as well as input/output operations by communicating with peripherals through addressing and transferring data and timing signals. The 8085 is an 8-bit microprocessor that can address 64KB of memory and has 40 pins.

Uploaded by

Jaswantb Singh
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PPT, PDF, TXT or read online on Scribd
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Microprocessor Architecture and its operation:

THE MICROPROCESSOR is a programable device, designed with registers,


flip-flops, and timing elements.

The process of data manipulation and communication is determined by


the logic design of the processor, called the architecture.

All the various fuctions performed by microprocessor can be classfied in 3


general categories:

1.Microprocessor-initiated operations
2.Internal Operations
3.Peripheral (or external initiated) operations
1.Microprocessor-initiated operations:
The MPU performs primarily 4 operations:

1.Memory Read: Reads data from memory


2.Memory Write: Writes data into memory
3.I/O Read: Accepts data from input deveices
4.I/O Write: Sends data to output devices

To communicate with a peripheral, the MPU need to perform the


following steps:

Step1: Identify the peripheral or the memory location (with its address)
Step2: Transfer binary information (data and instruction)
Step3 : Provide timing or synchronization signals.
2.Internal data operations :
The internal architecture of 8085 microprocessor determines how and
what operations can be performed with the data.
These operations are:

1. Store 8-bit data


2.Perform arithmetic and logical operations
3.Test for condition
4.Sequence the execution of instructions
5.Store data temporarily during execution in the defined R/W memory
locations called the stack.
3.Peripheral or Externally initiated operations:
External devices can initiate the following operations, for which
individual pins on the microprocessor chip are assigned:


Reset:

Interrupt:

Ready:

Hold:
There are two limitations in 8085 microprocessor:

1. The low-order address bus of the 8085 microprocessor is


multiplexed with data bus. The buses needed to be demultiplexed

2. Appropriate control singnals need to be generated to interface


memory and I/O with the 8085.

The 8085 microprocessor is



8-bit general purpose microprocessor

Capable of addressing 64k of memory

Has 40 pins

Requires +5 V single power supply

Can operate with 3MHz
All the signals can be classified into six groups:

1. Address bus

2. Data bus

3. Control and status signals

4. power supply and frequency signals

5. externally initaited signals

6. serial I/O ports


GENERATING CONTROL SIGNALS
d DE-MULTIPLEXED ADDRESS AND DATA BUS
Memory Interfacing:


Memory structure and its requirements


Basic concepts in Memory Interfacing
MP should 1. be able to select the chip
2. indentify the register
3. enable the appropriate buffer
Timing Diagrams: 1. Memory read cycle
2. Memory write cycle
Address Decoding:

1. Using NAND Gate

2. Using 3-to-8 Decoder


INSTRUCTION CLASSIFICATIONS:
The 8085 instructions can be classified into the following five fuctional
categories

1. DATA Transfer (copy) operations:

2. AIRTHMETIC Operations

3. LOGICAL Operations

4. BRANCHING Operations

5. MACHINE CONTROL OPERATIONS


An instruction is a command to the microprocessor to perform a
given task on specific data.

Each instruction has two parts:


1. Opcode (operational code): Task to be performed

2. Operand: The data to be operated on

Example: MOV C,A


The 8085 Instruction set is classified into the following 3 groups
according to word size or byte size:

1. one-byte instruction:
Register Addressing: In this mode the operands are in the general purpose registers.
For example: MOV A,B

Direct Addressing: In this mode of addressing the address of the operand is given in the
instruction itself.
For example: STA 2400H Store the contents of the accumulator in memory location
2400H.
IN 02 Reads data from port C and stores it in the accumulator.

Indirect Addressing: In this mode of addressing the address of the operand is


specified by a register pair.
For example: 1) LXI H, 2400H Loads H-L pair with 2400H
MOV A,M Move contents of the memory location, whose address
is in H-L pair (i.e. 2400H) to the accumulator
HLT Halt

2) LXI H, 2500H
ADD M
HLT
1. DATA Transfer (copy) operations:
Opcode Operand Description

MOV Rd,Rs Move


This is a 1-byte instruction
Copies data from Source Rs to
Destination reg. Rd

MVI R, 8-bit Move Immediate


This is a 2-byte instruction
Loads the 8-bits of the 2nd byte
Into the reg specified
OUT 8-bit port address Output to port
This is a 2-byte instruction
Sends the contents of A to

O/P
Opcode Operand Description
IN 8-bit port address Input from Port
This is a 2-byte instruction

Accepts data from the I/p port


Specified in the 2nd byte, and

load Into the A.

HLT Halt (1-byte operation)


The processor stops executing
And enters wait state
Address and data bus are
place In high impedance state.

NOP No Operation
This is a 1-byte instruction
No operation is performed.
2. AIRTHMETIC Operations
Opcode Operand Description
ADD R Add
This is a 1-byte instruction

add contents of reg R to the


Contents of A.

ADI 8-bit Add Immediate


This is a 2-byte instruction
Add the 2nd byte to the contents
Of A.
SUB R Subtract
This is a 1-byte instruction
Subtract the contents of reg R
From the contents of the A
2. AIRTHMETIC Operations cont...
Opcode Operand Description
SUI 8-bit Subtract Immediate
This is a 2-byte instruction

subtract the 2nd byte from the


Contents of the A.

INR R Increment
Increase the content of reg R by 1.

DCR R Decrement
This is a 1-byte instruction
Decreases the contents of reg R by 1
2. LOGIC Operations
Opcode Operand Description
ANA R Logical AND with A.
This is a 1-byte instruction

Cy is reset and AC is set

ANI 8-bit AND Immediate with A.


This is a 2-byte instruction
Cy is reset and AC is set

ORA R Logically OR with A.


This is a 1-byte instruction
Logically ORs the contents of the R
With the contents of the A.
3.LOGIC Operations: Cont..
Opcode Operand Description
ORI 8-bit OR Immediate with A
This is a 2-byte instruction

XRA R Logically Exclusive-OR with A.


This is a 1-byte instruction

XRI 8-bit Exclusive-OR immediate with A.


This is a 2-byte instruction

CMA Complement Accumulator


This is a 1-byte instruction
NO flaga affected

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