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Tiva C Series LaunchPad

Its a microcontroller

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Vivek Shrigiri
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0% found this document useful (0 votes)
533 views13 pages

Tiva C Series LaunchPad

Its a microcontroller

Uploaded by

Vivek Shrigiri
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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Getting Started

With the
Tiva™ C Series
TM4C123G
LaunchPad
Based IOT
Workshop
TI Embedded Processing Portfolio

TM4C123G MCU ...


Tiva™ TM4C123G Microcontroller

Low power consumption


 As low as 370 µA/MHz
 500µs wakeup from low-power modes
 RTC currents as low as 1.7µA
 Internal and external power control

Core and FPU ...


M4 Core and Floating-Point Unit
 32-bit ARM® Cortex™-M4 core
 Thumb2 16/32-bit code: 26% less memory & 25 % faster than pure 32-bit
 System clock frequency up to 80 MHz
 100 DMIPS @ 80MHz
 Flexible clocking system
 Internal precision oscillator
 External main oscillator with PLL support
 Internal low frequency oscillator
 Real-time-clock through Hibernation module
 Saturated math for signal processing
 Atomic bit manipulation. Read-Modify-Write using bit-banding
 Single Cycle multiply and hardware divider
 Unaligned data access for more efficient memory usage
 IEEE754 compliant single-precision floating-point unit
 JTW and Serial Wire Debug debugger access
 ETM (Embedded Trace Macrocell) available through Keil and IAR emulators

Memory ...
TM4C123GH6PM Memory

256KB Flash memory


 Single-cycle to 40MHz
 Pre-fetch buffer and speculative branch improves
performance above 40 MHz
32KB single-cycle SRAM with bit-banding
Internal ROM loaded with TivaWare software
 Peripheral Driver Library
 Boot Loader 0x00000000 Flash
 Advanced Encryption Standard (AES) cryptography
0x01000000 ROM
tables
 Cyclic Redundancy Check (CRC) error 0x20000000 SRAM
detection functionality
0x22000000 Bit-banded SRAM
2KB EEPROM (fast, saves board space)
 Wear-leveled 500K program/erase cycles 0x40000000 Peripherals & EEPROM
 Thirty-two 16-word blocks
0x42000000 Bit-banded Peripherals
 Can be bulk or block erased
 10 year data retention 0xE0000000 Instrumentation, ETM, etc.
 4 clock cycle read time

Peripherals ...
TM4C123GH6PM Peripherals
Battery-backed Hibernation Module
 Internal and external power control (through external voltage regulator)
 Separate real-time clock (RTC) and power source
 VDD3ON mode retains GPIO states and settings
 Wake on RTC or Wake pin
 Sixteen 32-bit words of battery backed memory
 5 µA Hibernate current with GPIO retention. 1.7 µA without
Serial Connectivity
 USB 2.0 (OTG/Host/Device)
 8 - UART with IrDA, 9-bit and ISO7816 support
 6 - I2C
 4 - SPI, Microwire or TI synchronous serial interfaces
 2 - CAN

More ...
TM4C123GH6PM Peripherals
Two 1MSPS 12-bit SAR ADCs
 Twelve shared inputs
 Single ended and differential measurement
 Internal temperature sensor
 4 programmable sample sequencers
 Flexible trigger control: SW, Timers, Analog comparators, GPIO
 VDDA/GNDA voltage reference
 Optional hardware averaging
 3 analog and 16 digital comparators
 µDMA enabled
0 - 43 GPIO
 Any GPIO can be an external edge or level triggered
interrupt
 Can initiate an ADC sample sequence or µDMA transfer
directly
 Toggle rate up to the CPU clock speed on the Advanced
High-Performance Bus
 5-V-tolerant in input configuration
(except for PB0/1 and USB data pins when configured as GPIO)
 Programmable Drive Strength (2, 4, 8 mA or 8 mA with slew rate control)
 Programmable weak pull-up, pull-down, and open drain

More ...
TM4C123GH6PM Peripherals
Memory Protection Unit (MPU)
 Generates a Memory Management Fault on incorrect access to region
Timers
 2 Watchdog timers with separate clocks
 SysTick timer. 24-bit high speed RTOS and other timer
 Six 32-bit and Six 64-bit general purpose timers
 PWM and CCP modes
 Daisy chaining
 User enabled stalling on CPU Halt flag from debugger for all timers
32 channel µDMA
 Basic, Ping-pong and scatter-gather modes
 Two priority levels
 8,16 and 32-bit data sizes
 Interrupt enabled

More...
TM4C123GH6PM Peripherals
Nested-Vectored Interrupt Controller (NVIC)
 7 exceptions and 71 interrupts with 8 programmable priority levels
 Tail-chaining and other low-latency features
 Deterministic: always 12 cycles or 6 with tail-chaining
 Automatic system save and restore

Two Motion Control modules. Each with:


 8 high-resolution PWM outputs (4 pairs)
 H-bridge dead-band generators and hardware polarity control
 Fault input for low-latency shutdown
 Quadrature Encoder Inputs (QEI)
 Synchronization in and between the modules

Board...
CC3100 SimpleLink™ Wi-Fi
CC3100 Hardware Overview

Features
 Dedicated ARM MCU.
 Wi-Fi
Driver and Multiple Internet Protocols
in ROM
 Interfaces with 16-, and 32-Bit MCU.
 Protocols
from the External Microcontroller
ASICs Over SPI or UART Interface.
 Low External Host Driver Footprint.
 Powerful Crypto Engine for Fast, Secure Wi-
Fi and Internet Connections with 256-Bit
AES.
 RX Traffic (MCU Active): 53 mA @ 54 OFDM
 TX
Traffic (MCU Active): 223 mA @ 54
OFDM
CC3100 Connection Block Diagram
Thanks for Attending!

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