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EECS 373: Design of Microprocessor-Based Systems

This document contains a summary of Lecture 2 from EECS 373: Design of Microprocessor-Based Systems. It discusses announcements, a recap of the previous lecture, and an introduction to architecture including instruction set architecture, the ARM architecture roadmap, ARM Cortex-M3 ISA details, and an example ARM assembly program. Key topics covered include the meaning of architecture in different contexts, what defines an instruction set architecture, and how the ARM ISA specifies instructions, registers, addressing modes, and more.

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102 views29 pages

EECS 373: Design of Microprocessor-Based Systems

This document contains a summary of Lecture 2 from EECS 373: Design of Microprocessor-Based Systems. It discusses announcements, a recap of the previous lecture, and an introduction to architecture including instruction set architecture, the ARM architecture roadmap, ARM Cortex-M3 ISA details, and an example ARM assembly program. Key topics covered include the meaning of architecture in different contexts, what defines an instruction set architecture, and how the ARM ISA specifies instructions, registers, addressing modes, and more.

Uploaded by

avinash_yuvaraj
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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You are on page 1/ 29

EECS 373

Design of Microprocessor-Based Systems

Prabal Dutta
University of Michigan

Lecture 2: Architecture, Assembly, and ABI


September 9, 2010

1
Announcements

• Q&A website for class discussion


– http://nuclear.eecs.umich.edu
– Good for discussion outside of class
– Strongly encourage you to log issues there

• Actel Eval Boards


– Yes, you keep them for the term!
– This is an experiment to see what you do with them
– Enables students to explore ideas, labs, etc outside class
– Encourage you to install tool chain and try out Actel tutorials

• Will drop lowest minute quiz (only one)

2
Recap of the last lecture

• What distinguishes embedded systems?


– Application-specific
– Resource-constrained
– Real-time operations
– Software runs “forever”
• Technology scaling is driving “embedded everywhere”
– Microprocessors
– Memory (RAM and Flash)
– Imagers and MEMS sensors
– Energy storage
• Embedded platforms and software
– How does a phone boot? HW, SW, INT, and drivers
– What are the components of a DSL modem? 18 major parts
– Why the ARM architecture? 90%+ of 32-bit embedded CPUs
– How do ARM licensees differentiate products? Peripherals

3
Architecture

4
In the context of computers,
what does architecture mean?

5
Architecture has many meanings

• Computer Organization (or Microarchitecture)


– Control and data paths
– I/D pipeline design
– Cache design
– …

• System Design (or Platform Architecture)


– Memory and I/O buses
– Memory controllers
– Direct memory access
– …

• Instruction Set Architecture (ISA)

6
What is an
Instruction Set Architecture (ISA)?

7
An ISA defines the hardware/software interface

• A “contract” between architects and programmers


• Instruction set
• Register set
• Memory and addressing modes
• Word sizes
• Data formats
• Operating modes
• Condition codes
• Calling conventions

8
ARM Architecture roadmap

9
ARM Cortex-M3 ISA

Instruction Set Register Set Address Space

Branching
Data processing
Load/Store
Exceptions
Miscellaneous

32-bits 32-bits
Endianess Endianess
10
Registers

Mode dependent

11
Address Space

12
Instruction Encoding
ADD immediate

13
Branch

14
Data processing instructions

Many, Many More!

15
Load/Store instructions

16
Miscellaneous instructions

17
Addressing Modes

• Offset Addressing
– Offset is added or subtracted from base register
– Result used as effective address for memory access
– [<Rn>, <offset>]
• Pre-indexed Addressing
– Offset is applied to base register
– Result used as effective address for memory access
– Result written back into base register
– [<Rn>, <offset>]!
• Post-indexed Addressing
– The address from the base register is used as the EA
– The offset is applied to the base and then written back
– [<Rn>], <offset>
<offset> options

• An immediate constant
– #10

• An index register
– <Rm>

• A shifted index register


– <Rm>, LSL #<shift>
Application Program Status Register (APSR)
Updating the APSR

• SUB Rx, Ry
– Rx = Rx - Ry
– APSR unchanged
• SUBS
– Rx = Rx - Ry
– APSR N or Z bits might be set
• ADD Rx, Ry
– Rx = Rx + Ry
– APSR unchanged
• ADDS
– Rx = Rx + Ry
– APSR C or V bits might be set
Conditional execution:
Append to many instructions for conditional execution
The ARM architecture “books” for this class

23
The ARM software tools “books” for this class

24
An ARM assembly language program for GNU

.equ STACK_TOP, 0x20000800


.text
.syntax unified
.thumb
.global _start
.type start, %function

_start:
.word STACK_TOP, start
start:
movs r0, #10
movs r1, #0
loop:
adds r1, r0
subs r0, #1
bne loop
deadloop:
b deadloop
.end

25
A simple Makefile

all:
arm-none-eabi-as -mcpu=cortex-m3 -mthumb example1.s -o example1.o
arm-none-eabi-ld -Ttext 0x0 -o example1.out example1.o
arm-none-eabi-objcopy -Obinary example1.out example.bin
arm-none-eabi-objdump -S example1.out > example1.list

26
An ARM assembly language program for GNU

.equ STACK_TOP, 0x20000800


.text
.syntax unified
.thumb
.global _start
.type start, %function

_start:
.word STACK_TOP, start
start:
movs r0, #10
movs r1, #0
loop:
adds r1, r0
subs r0, #1
bne loop
deadloop:
b deadloop
.end

27
Disassembled object code

example1.out: file format elf32-littlearm

Disassembly of section .text:

00000000 <_start>:
0: 20000800 .word 0x20000800
4: 00000009 .word 0x00000009

00000008 <start>:
8: 200a movs r0, #10
a: 2100 movs r1, #0

0000000c <loop>:
c: 1809 adds r1, r1, r0
e: 3801 subs r0, #1
10: d1fc bne.n c <loop>

00000012 <deadloop>:
12: e7fe b.n 12 <deadloop>

28
Questions?

Comments?

Discussion?

29

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