Analog to Digital Converter
(ADC)
EL3096 Sistem Mikroprosesor & Lab
Analog to Digital Converter
An analog-to-digital converter (abbreviated ADC, A/D or A
to D) is a device that uses sampling to convert a
continuous quantity to a discrete time representation in
digital form.
Resolution
The resolution of the converter indicates the number of
discrete values it can produce over the range of analog
values.
The resolution Q of the ADC is
EFSR
Q M M is the ADC's resolution in bits
E is the full scale voltage range
2 FSR
EFSR VREFHI VREFLO
The number of voltage intervals is
N 2 1M
Sampling Rate
The sampling rate, sample rate, or sampling frequency (fs)
defines the number of samples per unit of time (usually
seconds) taken from a continuous signal to make a
discrete signal.
For time-domain signals, the unit for sampling rate is Hz,
sometimes noted as Sa/s (samples per second).
Must adhere to Nyquist–Shannon sampling theorem
Nyquist–Shannon sampling theorem
Perfect reconstruction of a signal is possible when the
sampling frequency is greater than twice the maximum
frequency of the signal being sampled, or equivalently.
Nyquist frequency (half the sample rate) exceeds the
highest frequency of the signal being sampled
Quantization Error
It is a rounding error between the analog input voltage to
the ADC and the output digitized value.
ADC Parameter
Response type
Most ADCs are linear types.
The term linear implies that the range of input values has a
linear relationship with the output value.
Accuracy
Quantization error
Aperture error which is due to a clock jitter and is revealed
when digitizing a time-variant signal (not a constant value)
These errors are measured in a unit called the least significant
bit (LSB).
An error of one LSB is 1/256 of the full signal range, or about 0.4%.
Macam-macam ADC
Dari cara kerja
Flash ADC
SAR (Successive Approximation Register)
Dual Slope
Sigma Delta
Dari ukuran bit
8 bit, 10 bit, 12 bit, 16 bit dan seterusnya
Flash ADC
Direct conversion is very fast, capable
of gigahertz sampling rates, but usually
has only 8 bits of resolution or fewer,
since the number of comparators
needed, 2N - 1, doubles with each
additional bit, requiring a large,
expensive circuit.
Integrating ADC: Single Slope ADC
VIN
VINT tINT V0
RC
VIN
VINT V0 tINT
RC
VREF V0 RC
tINT
VIN
tINT VIN
Dual Slope Integrating ADC
VIN VREF V
VINT tINT V0 , V0 0 td IN tINT 0
RC RC RC
VIN VREF td
VUP tINT VDOWN td VUP 0 VIN VREF
RC RC tINT
Dual Ramp ADC
Successive Approximation ADC
State Diagram dari SAR-ADC
Sample & Hold
ADC jenis integrating & SAR perlu input yang tidak
berubah selama konversi, untuk itu perlu rangkaian
tambahan Sample & Hold
ADC pada ATMega8535: SAR
DAC
Summing Amplifier
DAC
This approach is not satisfactory for a large number of bits because
it requires too much precision in the summing resistors. This
problem is overcome in the R-2R network DAC.
DAC
R-2R with Summing Amplifier
R-2R Ladder
2R V0
VTH V0
2R 2R 2
2R 2R
RTH R
2R 2R
A-to-D conversion: Typical embedded application
The ADC in ATmega8535
The ADC in ATmega16 has a 10-bit resolution.
The digital output has n = 10 bits.
The ADC has 8 input channels.
Analogue input can come from 8 different sources.
However, it performs conversion on only one channel at a time.
If default reference voltage Vref = 5V is used.
step size: 5(V)/1024 (steps) = ± 4.88mV.
accuracy: 2 × LSB = ± 9.76mV.
The clock rate of the ADC can be different from the CPU clock
rate.
One ADC conversion takes 13 ADC cycles.
An ADC prescaler will decide the ADC clock rate.
ADC unit ─ Relevant pins
ADC unit ─ Block diagram
Major aspect of ADC
What are the relevant ADC registers?
ADCMUX
ADCH/ADCL
ADCCSRA
SFIOR
What are the steps to use the ADC?
How to use the ADC interrupt?
ADC Multiplexer Selection Register (ADCMUX)
Reference voltage Vref can be selected among 3 choices.
Analogue input voltage can be selected among different
pins. Differential input and custom gain factor can also be
chosen.
ADLAR flag will determine how the 10-bit digital output
will be stored in output register
Selecting reference voltage Vref
ADC reference voltage selection
REFS1 REFS0 Voltage Reference Selection
0 0 AREF, Internal Vref turned off
0 1 AVCC with external capacitor at
AREF pin
1 0 Reserved
1 1 Internal 2.56V Voltage Reference with
external capacitor at AREF pin
Usually, mode 01 is used: AVCC = 5V as voltage reference.
However, if the input voltage has a different dynamic range,
we can use mode 00 to select an external reference voltage
Selecting input source and gain factor
ADC input source
Analogue input voltage
can be selected as
8 ADC pins-ADC7 to ADC0,
the differential input
between two of ADC pins.
A gain factor of 1, 10 or
200 can be selected for
differential input
ADC Left Adjust flag and ADCH/L registers
Digital output is stored in two 8-bit registers ADCH and ADCL.
The format of ADCH and ADCL are interpreted differently
depending on flag ADLAR.
Important: When retrieving digital output, register ADCL must
be read first, before register ADCH.
ADC Control and Status Register (ADCCSRA)
ADC unit can operate in two modes: manual or auto-trigger.
In manual mode, setting flag ADSC = 1 will start conversion.
In auto-trigger mode, a predefined event will start conversion
ADC clock
ADC Prescaler Selection
The clock of the ADC is obtained by dividing the CPU clock and a
division factor.
There are 8 possible division factors, decided by the three bits
{ADPS2, ADPS1, ADPS0}
Example: Using internal clock of 1MHz and a ADC prescaler bits of
‘010’, the clock rate of ADC is: 1MHz/4 = 250Hz.
Special Function IO Register (SFIOR)
Three flags in register SFIOR specify the event that will auto-
trigger an A-to-D conversion
Steps to use the ADC
Step 1: Configure the ADC using registers ADMUX, ADCSRA,
SFIOR.
What is the ADC source?
What reference voltage to use?
Align left or right the result in {ADCH, ADCL}?
Enable or disable ADC auto-trigger?
Enable or disable ADC interrupt?
What is the ADC pre-scaler?
Step 2: Start ADC operation
Write 1 to flag ADSC (register ADCCSRA).
Step 3: Extract ADC result
Wait until flag ADSC becomes 0.
Read result from registers ADCL and then ADCH.
Performing ADC
Write C program that repeatedly performs ADC on
a sinusoidal signal and displays the result on LEDs.
Step 1: Configure the ADC
What is the ADC source? ADC0
What reference voltage to use? AVCC = 5V
Align left or right? Left, top 8-bit in ADCH
Enable or disable ADC auto-trigger?Disable
Enable or disable ADC interrupt? Disable
What is the ADC pre-scaler? 2 (fastest conversion)
Performing ADC
Step 1: Configure the ADC
What is the ADC source? ADC0 (pin A.0)
What reference voltage to use? AVCC = 5V
Align left or right? Left, top 8-bit in ADCH
Enable or disable ADC auto-trigger? Disable
Enable or disable ADC interrupt? Disable
What is the prescaler? 2 (010)
1
Steps 2 and 3: Show next in the C program.
adc.c
Using ADC interrupt
In the polling approach shown previously, we must check
ADSC flag to know when an ADC operation is completed.
The ADC unit can trigger an interrupt when ADC
operation is done.
We enable ADC interrupt through ADIE flag in register
ADCCSRA.
In the ISR, we can write code to read registers ADCL and
ADCH.
ADC interrupt is usually combined with auto-trigger mode
ADC interrupt
Write interrupt-driven program to digitize a sinusoidal
signal and display the result on LEDs.
Step 1: Configure the ADC
What is the ADC source? ADC0
What reference voltage to use? AVCC = 5V
Align left or right? Left, top 8-bit in ADCH
Enable or disable ADC auto-trigger?Disable
Enable or disable ADC interrupt? Enable
What is the prescaler? 2 (fastest conversion)
Step 2: Start ADC operation
Step 3: In ISR, read and store ADC result.
adc_int.c