CMOS CM & Biasing

Circuits
Main topics of the presentation

The presentation introduces to the basic building blocks of CMOS biasing

circuits:

- Current Mirrors;

- Current References;

- Voltage References.

CMOS Analog IC
Emil D. Manolov, TU-Sofia CMOS Biasing Circuits 2
Current mirrors

This part presents the most used current mirrors:

- simple current mirror;
- cascode current mirror;
- high-swing cascode current mirror;
- Wilson current mirror;
- regulated cascode current mirror.

CMOS Analog IC
Emil D. Manolov, TU-Sofia CMOS Biasing Circuits 3
Current mirror definition

The current mirrors are basic building block of the analog and mixed
integrated circuits.
Their output generates a replica of the input reference current, i.e.

Iout m Iref

The ratio m between both currents can be equal, higher or smaller than 1.

CMOS Analog IC
Emil D. Manolov, TU-Sofia CMOS Biasing Circuits 4
Current mirror model

If we look at the electric

function of the circuit,
the ideal current mirror is
a current controlled
current source (CCCS).

In practice the real current mirrors are not able to accomplish

the function of a CCCS exactly.

CMOS Analog IC
Emil D. Manolov, TU-Sofia CMOS Biasing Circuits 5
Basic current mirror

Figure shows the basic current mirror with NMOS and PMOS
transistors.
The input current is Iref, the output current is Iout.

CMOS Analog IC
Emil D. Manolov, TU-Sofia CMOS Biasing Circuits 6
Basic current mirror analysis
The operation of the circuit is based on the principle of matched devices.
If two transistors operate in strong inversion and are in saturation, the expressions for
the current Iref flowing through transistor Mr, and the current Iout through Mo are:

Since the bulk-source voltages of Mr and Mo are identical we can assume that the
theirs threshold voltages are identical too, i.e. VTNr = VTNo . The gate-source voltages
VGSr and VGSo are the same, so the ratio of the currents is given by

Finally, the products of the channel modulation effects (r and o) and the drain-
source voltages (VDSr and VDSo) are much smaller then 1, so the above ratio can be
simplified to

CMOS Analog IC
Emil D. Manolov, TU-Sofia CMOS Biasing Circuits 7
Basic current ratio formula

Important!
The current ratio depends mainly from the horizontal layout of the transistors,
i.e. the sizes of width (W) and length (L) of the corresponding channels (see the
picture).

CMOS Analog IC
Emil D. Manolov, TU-Sofia CMOS Biasing Circuits 8
Simplified current ratio formula

The values of the sizes of the MOS transistor are a result from the designers
dimensioning and can be implemented fairly exact in the chip. This is the reason
current mirror circuits to be widely used in practice.
Current mirrors usually employ the same length for all of the transistors in order
to minimize errors due to the side-diffusion of the source and drain areas (LD on
the figure). Then the equation for current ratio simplifies

CMOS Analog IC
Emil D. Manolov, TU-Sofia CMOS Biasing Circuits 9
Simulation testing of current mirrors

The figure shows a test-bench for simulation of basic characteristics of NMOS

current mirror. Using this circuit the transfer (Iout=f(Iref)) and the output
(Iout=f(Vout)) characteristics can be obtained.

CMOS Analog IC
Emil D. Manolov, TU-Sofia CMOS Biasing Circuits 10
Output characteristic of NMOS current mirror

Basic parameters:
-minimum output voltage Vmin;
-small signal output resistance rout

Vmin is the minimum output voltage, which guarantees the operation of the transistor
Mo in saturation.
Vmin VGS VTNo VGS VTN 0

The small signal output resistance rout characterizes the dependency of the output current
Iout on the output voltage Vout (the slope of the Iout vs. Iref). This resistance is equal
of the output resistance of the transistor Mo.
1
rou t
o I ou t
CMOS Analog IC
Emil D. Manolov, TU-Sofia CMOS Biasing Circuits 11
Family of output characteristics

The figure shows a family of output characteristics for different values of Iref.
The conclusions is:
The higher Iref the higher Vmin and the smaller rout.

CMOS Analog IC
Emil D. Manolov, TU-Sofia CMOS Biasing Circuits 12
Transfer characteristic

The figure shows the ideal (in red) and the real (in green) transfer characteristics of a
current mirror. The best fitting is between Imin and Imax of the input current Iref. The
limits depend on the chosen current ratio and are different for different type of mirrors.
Usually these borders fix the recommended working area of the mirror.

CMOS Analog IC
Emil D. Manolov, TU-Sofia CMOS Biasing Circuits 13
Sensitivity of the current mirror

The sensitivity of the current mirror characterizes the dependency of the

output current on the DC power supply voltage, temperature, or the process
variation.
For example, the sensitivity of the Iout to VDD is defined as follows:

Iout
S Iout Iout Iout VDD
VDD
VDD Iout VDD
VDD

For reliable operation of the mirror it is necessary the value of the sensitivity to be
minimal.

CMOS Analog IC
Emil D. Manolov, TU-Sofia CMOS Biasing Circuits 14
Matching accuracy

When the current ratio m is different from 1 the two transistors in the
current mirror have a different W/L ratio and consequently their layouts
are not identical. Then their threshold voltages are different and also
parasitic resistances appear, which reduce the power supply voltage. The
formulas for the current ratio becomes more complex:

I out Wo Lr VGSo VTNo 1 o VDSo

2

I re f Lo Wr VGSr VTNr 2 1 r VDSr

Consequently, the asymmetries in the layout of the transistors cause errors in the
value of the output current. Depending on the particular case, the error of the
output current can reach up to 10-20 %.

CMOS Analog IC
Emil D. Manolov, TU-Sofia CMOS Biasing Circuits 15
System of current mirrors

Figure shows a system of current mirrors, which consists of simple current mirrors
with NMOS and PMOS transistors. Near to each transistor its W/L ratio is
specified. The transistors M6, M7 and M8 are current sources. The transistors M2,
M3, M4 are current sinks. Check the values of the currents by using the above
discussed formulas.
CMOS Analog IC
Emil D. Manolov, TU-Sofia CMOS Biasing Circuits 16
Summing up of currents

The figure demonstrate how we can summing up different currents using

current mirrors.
Transistor pairs M5-M6, M5-M7 and M2-M3 are simple current mirrors.
The current through M2 is the sum of the currents through M6 and M7.

CMOS Analog IC
Emil D. Manolov, TU-Sofia CMOS Biasing Circuits 17
Subtracting of currents

The figure demonstrate how we can subtract different currents using current mirrors.
Transistor pairs M1-M2, M3-M4 and M5-M6 are simple current mirrors.
The current through M3 is the difference between the currents through M6 and M2.

CMOS Analog IC
Emil D. Manolov, TU-Sofia CMOS Biasing Circuits 18
Improved current mirrors

The improved current mirrors have higher output impedance than simple
current mirrors. To this aim the designers add one or several supplement
transistors in series with the output one. The approach increases many times
the output resistance, but enlarges important the minimum output voltage
Vmin. To avoid this drawback, different solutions can be applied.
In the next slides we will discuss the most popular improved current mirror
circuits:
- cascode current mirror;
- high-swing cascode current mirror;
- Wilson current mirror;
- regulated cascode current mirror.

CMOS Analog IC
Emil D. Manolov, TU-Sofia CMOS Biasing Circuits 19
Cascode current mirror

The figure present the cascode current mirror

with NMOS.
A similar solution with PMOS is possible, also.

To increase the output resistance the second transistor M2, in series with M4 is
connected. The output resistance is:
rout g m 2 ro 2 ro 4
Vmin Vds 2 Vds 4
As a result Vmin increases from Veff up to Vds 4 Vgs 4 VTN Vds3 VTN
Vmin 2V eff VTN 0
CMOS Analog IC
Emil D. Manolov, TU-Sofia CMOS Biasing Circuits 20
High-swing cascode current mirror

To decrease the Vmin of the cascode current mirror a high-swing cascode current
mirror is used.
This circuit keep the high output impedance of the cascode current mirror, along with
decreased value of Vmin:

Vmin 2Ve ff

CMOS Analog IC
Emil D. Manolov, TU-Sofia CMOS Biasing Circuits 21
Wilson current mirror

rout g m 2 ro 2 ro1
The presented circuits is Wilson current mirror.
The circuit uses additional series transistor (M2) and negative feedback
(implemented with M1-M3 pair) to improve the output resistance and to stabilize
the output current.
The drawback of the circuit is the high value of Vmin:
Vmin 2Veff VTN 3 2Veff VTN 0
CMOS Analog IC
Emil D. Manolov, TU-Sofia CMOS Biasing Circuits 22
Regulated cascode current mirror
If Vo inc, Id2 inc, but all I in ckt are const.
so Vds4 inc which dec volt at A, thus Vg3
dec, Id3 dec but has to be const so Vds3
dec, volt at B dec, thus Vgs2 dec causes
I0 to dec, thus Io stabilizes.
B

The figure shows the regulated cascode current mirror.

The circuit uses an additional series transistor (M2) and a negative feedback (made by
transistor M3) to improve the output resistance and to stabilize the output current. The
Vmin of the circuit has less value

Vmin 2Veff VTN 3 2Veff VTN 0

CMOS Analog IC
Emil D. Manolov, TU-Sofia CMOS Biasing Circuits 23
Instructions for self-study

The past presentation gives only a first sight on the current mirror circuits. After
reading and understanding the presented information you have to study the material
from at least one of the following textbooks:
- R. Baker, H. Li, D.Boyce. CMOS Circuit Design, Layout and Simulation, IEEE
Press, New York, 2005, ISBN 0-7803-3416-7. Chapter 20, pp.427-462.
- Ph. E. Allen, D. R. Holberg, and Allen. CMOS Analog Circuit Design, Oxford
University Press, Inc., 2002. ISBN 0-19-511644-5, Chapter 4.1-4.4, pp. 113-142.
- F. Maloberti. Analog design for CMOS VLSI Systems. Kluwer Academic
Publishers, 2003, eBook ISBN: 0-306-47952-4, Print ISBN: 0-7923-7550-5,
Chapter 4.1, pp.155-177.
The next step in the learning process is to study the examples and complete the
experiments, which are presented in Guided exercise 2 and Non-guided exercise 1.
After that you can go on to the next part : Current references

CMOS Analog IC
Emil D. Manolov, TU-Sofia CMOS Biasing Circuits 24
Current reference circuits

The current reference circuit provides a current with high precise and
stability.
The ideal current reference is independent of power supply voltage,
temperature and process variation.
The figure shows the graphical representation and the large signal current
characteristic of an ideal current reference.

CMOS Analog IC
Emil D. Manolov, TU-Sofia CMOS Biasing Circuits 25
The resistor as a simple current reference

The most simple current reference is the resistor.

In this case the output current Iref is equal of:
Vout
Iref
R
The temperature coefficient depends on the used technology and is equal of the
temperature coefficient of the resistor:
TCI re f TCR

The sensitivity of the Iref to Vout is extremely high:

Iref
S Ire f
Iref Iref Vout 1 R 1
Vout
Vout Vout Iref R
Vout

and for this reason more complex and precise circuits are used in the practice.
CMOS Analog IC
Emil D. Manolov, TU-Sofia CMOS Biasing Circuits 26
Improved current reference circuits

In the next slides are presented some current reference circuits, which are
weakly depended on the power supply voltage:

- Threshold voltage referenced self-biasing circuits;

- Diode voltage referenced self-biasing circuits;

- Thermal voltage referenced self-biasing circuit;

- Beta multiplier referenced self-biasing circuit.

CMOS Analog IC
Emil D. Manolov, TU-Sofia CMOS Biasing Circuits 27
Threshold voltage referenced circuit
Figure shows the threshold voltage
referenced circuit, also called bootstrap
reference.

The reference current can be found from the equation, which demonstrate the current
independency of the power supply voltage VDD.
2I re f
VTN 0
VGS2 nCox W 2 / L2
I re f
R R
The threshold voltage has a negative temperature coefficient, which determine the
negative value of the TCIref.
CMOS Analog IC
Emil D. Manolov, TU-Sofia CMOS Biasing Circuits 28
Diode voltage referenced circuit

The reference current of the diode voltage

referenced circuit is independent of the
power supply voltage VDD.
The voltage across resistance R is equal to
the voltage across the forward biased
emitter-base junction of the diode-connected
transistor Q. Thus, the equation for the Iref
is

VEB nT I re f
I re f ln
R R Is

where T is the thermal voltage (about 25.8 mV at 300K), Is is the saturation current of
the emitter junction of the bipolar transistor Q, n is empirical coefficient between 1 and 2.
The diode voltage has a negative temperature coefficient, which together with the
positive TC of the resistor R, cause the negative value of the TCIref.

CMOS Analog IC
Emil D. Manolov, TU-Sofia CMOS Biasing Circuits 29
Thermal voltage referenced circuit - var.1
Figure shows the thermal voltage referenced
circuit, where the area of the transistor Q2 is
m times higher than the area of the transistor
Q1. Then, we have
VEB 1 VEB 2 Ire fR
I re f I
i.e. nT ln nT ln re f I re fR
IS mI S

Finally, we find
VEB 1 VEB 2 nT
I re f ln( m)
R R

where T is the thermal voltage (about 25.8 mV at 300K), n is empirical coefficient

between 1 and 2.
The thermal voltage has a positive temperature coefficient, which determine the positive
value of the TCIref.

CMOS Analog IC
Emil D. Manolov, TU-Sofia CMOS Biasing Circuits 30
Thermal voltage referenced circuit - var.2

Figure shows a second variant of the thermal voltage referenced circuit, where the
areas of the transistors Q1 and Q2 are equal. Then, the equation for the reference
current is the same as in previous variant, but in this case m is the current ratio:

VEB 1 VEB 2 nT
I re f ln( m)
R R

CMOS Analog IC
Emil D. Manolov, TU-Sofia CMOS Biasing Circuits 31
Beta multiplier referenced circuit var.1

The beta multiplier referenced

circuit has two basic operating
modes.
In the first case all transistors work
in strong inversion, saturation
region, so we can find that

VGS2 VGS1 Ire fR

2I re f 2I re f
VTN 0 VTN 0
VGS2 VGS1 nCox ( Wn / Ln ) nCoxm( Wn / Ln )
I re f
R R
2
2
I re f 2 1 1
R n Cox ( Wn / Ln ) m

The circuit has a positive temperature coefficient.

CMOS Analog IC
Emil D. Manolov, TU-Sofia CMOS Biasing Circuits 32
Beta multiplier referenced circuit - var.2

In the second case transistors M1 and M2

work in weak inversion (sub-threshold
region). As we know in this region the
behavior of the MOS transistor is like to
the bipolar one. The corresponding
equations are:
VGS2 VGS1 Ire fR

I Ln I Ln
n T ln re f n T ln re f
VGS2 VGS1 DO
I Wn DO
I m Wn
I re f
R R

nT
I re f ln( m)
R
The last equation confirm the independence of reference current of the power
supply voltage. The circuit has a positive temperature coefficient. It is useful for
operation in low-voltage, low-power circuits.

CMOS Analog IC
Emil D. Manolov, TU-Sofia CMOS Biasing Circuits 33
Temperature coefficients

As it is presented in the previous slides, the temperature coefficients of the discussed

circuits depend on the applied principle of stabilization of the reference current.

To compute the corresponding temperature coefficients of the consider circuits we can

use the following data:
Typical values of the TCR for n=well, n+/p+ (active) and poly resistors are: 10000,
2000 and 1000[ppm/oC] respectively. (1ppm/oC=10-6/oC)
The temperature coefficient of the threshold voltage is about -3000[ppm/oC].
The temperature coefficient of the diode voltage is approximately -3300[ppm/ oC]
(-2mV /oC ).
The temperature coefficient of the thermal voltage is approximately +3300[ppm/oC]
(0.085mV/oC).
The temperature coefficient of the mobility is equal of -1.5/T[oC-1].

CMOS Analog IC
Emil D. Manolov, TU-Sofia CMOS Biasing Circuits 34
Simulation testing of current reference

The figure shows a recommended connection for simulation of basic characteristics of

current reference circuits. M6 imitates the load in this circuit.
Using the presented test-bench the dependency of the reference current vs. power
supply voltage Iref=f(VDD) and the temperature characteristic Iref=f(T) can be
obtained.

CMOS Analog IC
Emil D. Manolov, TU-Sofia CMOS Biasing Circuits 35
The reference current vs. power supply voltage

Figure shows reference current vs. power supply voltage characteristic - Iref=f(VDD).
From this characteristic we can read that the minimum power supply voltage, which
guarantees the circuit operation is about 1.8V.
Also, we can examine that the output resistance in operating region is higher then
2M.
CMOS Analog IC
Emil D. Manolov, TU-Sofia CMOS Biasing Circuits 36
Temperature characteristic

Figure shows the reference current vs. temperature characteristic - Iref=f(T).

We can read that the difference between the minimal and maximal values of the
reference current for the 200oC temperature range is 8.6uA. Consequently the
temperature coefficient is about 43nA/oC (i.e. 0.22%/oC).

CMOS Analog IC
Emil D. Manolov, TU-Sofia CMOS Biasing Circuits 37
Instructions for self-study

The past presentation gives only a first sight on the current references. After
reading and understanding the presented information you have to study the material
from at least one of the following textbooks:
- R. Baker, H. Li, D.Boyce. CMOS Circuit Design, Layout and Simulation, IEEE
Press, New York, 2005, ISBN 0-7803-3416-7. Chapter 21.2 (pp.469-476) and 21.4
(480-488).
- Ph. E. Allen, D. R. Holberg, and Allen. CMOS Analog Circuit Design, Oxford
University Press, Inc., 2002. ISBN 0-19-511644-5, Chapter 4.5, pp. 143-152.
- F. Maloberti. Analog design for CMOS VLSI Systems. Kluwer Academic
Publishers, 2003, eBook ISBN: 0-306-47952-4, Print ISBN: 0-7923-7550-5,
Chapter 4.2, pp.178-195.
The next step in the learning process is to study the examples and complete the
experiments, which are presented in Guided exercise 3 and Non-guided exercise 2.
After that you can go on to the next part : Voltage references

CMOS Analog IC
Emil D. Manolov, TU-Sofia CMOS Biasing Circuits 38
Voltage references

The last part of the presentation contains the information about basic voltage
reference circuit:

- voltage dividers;

- band-gap voltage reference;

- beta multiplier voltage reference.

CMOS Analog IC
Emil D. Manolov, TU-Sofia CMOS Biasing Circuits 39
Voltage reference definition

The voltage reference circuit provides a voltage with high precise and stability.
The ideal voltage reference is independent of power supply voltage, temperature and
process variation.
The figure shows the graphical representation and the large signal current characteristic
of an ideal voltage reference.

CMOS Analog IC
Emil D. Manolov, TU-Sofia CMOS Biasing Circuits 40
Voltage dividers

The most typical voltage dividers are shown in the figure.

The left circuit is conventional voltage divider formed with two resistors. The big
problem with this solution is that in order to reduce the current consumption the
resistors must be too large, which increases the area of the die.
The second circuit uses NMOS transistor and resistor. The reference voltage is equal of:
2 2 ( VDD Vre f )
Vre f VGS VTN 0 I R VTN 0
nCox ( W / L) nCox ( W / L) R
and depends strongly on the power supply voltage and the absolute tolerance of the
resistance R.
CMOS Analog IC
Emil D. Manolov, TU-Sofia CMOS Biasing Circuits 41
The MOS-only voltage divider
The third circuit is most frequently used in practice. In this circuit both transistors
operate in strong inversion, saturation region. The currents through M1 and M2 are
equals and we can write
nCox Wn C
Vref VTNo 2 p ox Wp VDD Vref VTP 0 2
2 Ln 2 Lp

Consequently, the equation for the reference voltage is

given by

nCox ( Wn / Ln )
VDD VTP 0 VTN 0
pCox ( Wp / Lp )
Vre f
nCox ( Wn / Ln )
1
pCox ( Wp / Lp )

The formula demonstrates the strong dependency of the reference voltage Vref on
the power supply voltage VDD. The circuit is characterized with high temperature
and process variation instability.

CMOS Analog IC
Emil D. Manolov, TU-Sofia CMOS Biasing Circuits 42
Improved voltage reference circuits

The main drawback of using voltage dividers is that they are very sensitive to
the power supply voltage and temperature.

In the next slides are presented two widely used improved voltage reference
circuits, which are weakly depended on the power supply voltage and
temperature:
- Band-gap voltage reference;
- Beta multiplier voltage reference.

CMOS Analog IC
Emil D. Manolov, TU-Sofia CMOS Biasing Circuits 43
Band-gap voltage reference
Band-gap voltage reference compensates
the positive TC of the thermal voltage
current source with the negative TC of the
diode forward voltage. In the presented
circuit the area of the Q2 is m times
higher than the area of the Q1. Thus
nT
I ln( m)
R
and consequently

Vref L R I VEB n L ln( m) T VEB

The condition for the temperature compensation is

VEB
Vre f T VEB
n L ln( m) 0 i.e. n L ln( m) T 2mV / C 23.5
o

T T T T 0.085mV / o C
T
Finally, for compensated circuit, we can find
Vref n L ln( m) T VEB 23.5 0.0258V 0.6V 1.206V
CMOS Analog IC
Emil D. Manolov, TU-Sofia CMOS Biasing Circuits 44
Band-gap voltage temperature compensation

Figure demonstrates the temperature compensation in the band-gap voltage reference.

The current I, which is generated by the thermal voltage current source has positive
TC (the upper chart). The voltage VE(Q3) between the emitter and the base of the
diode connected transistor has a negative TC. As a result the reference voltage, which
is the sum of the emitter-base voltage and the voltage drop across the resistance L.R,
depends very weakly from the temperature (lower chart).

CMOS Analog IC
Emil D. Manolov, TU-Sofia CMOS Biasing Circuits 45
Beta multiplier voltage reference
Figure shows the beta multiplier
voltage reference. The circuit is the
same as previous discussed beta
multiplier referenced current source-
var.1. The reference voltage is VGS2.
VGS2 Ve ff2 VTN 2

2Ire f
VGS2 VTN 0
nCox ( Wn / Ln )

2
2
Applying that I re f 2 1 1
R nCox ( W / L ) m we find that Vref is equal to

2 1
Vre f VGS2 1 VTN 0 and is independent of VDD.
RnCox ( Wn / Ln ) m
The condition for the temperature compensation is
Vref VTN 0 2 1 1 R 1 n
1 0
T T R nCox ( Wn / Ln ) m R T n T

CMOS Analog IC
Emil D. Manolov, TU-Sofia CMOS Biasing Circuits 46
Temperature characteristic

Figure shows a temperature characteristic of voltage reference circuit. In this chart,

the difference between minimum and maximum reference voltage, when the
temperature changes from -50oC to 150oC, is 3mV.

CMOS Analog IC
Emil D. Manolov, TU-Sofia CMOS Biasing Circuits 47
The reference voltage vs. power supply voltage

The figure presents another important characteristic of the voltage references -

Vref = f (VDD). In this case the minimum power supply voltage VDDmin is about
1.9V. The slope of the output voltage Vref vs. VDD in the operation region is about
35mV/V.

CMOS Analog IC
Emil D. Manolov, TU-Sofia CMOS Biasing Circuits 48
Improved band-gap voltage reference

Frequently, in order to minimize the slope of the output voltage Vref vs. power
supply voltage VDD (see the previous chart) a cascode current mirror (M3,M7-
M4,M6) is used instead of simple current mirror. This approach reduce the effects
of the finite output resistance of the MOS transistors.
CMOS Analog IC
Emil D. Manolov, TU-Sofia CMOS Biasing Circuits 49
Instructions for self-study

The past presentation gives only a first sight on the voltage references. After
reading and understanding the presented information you have to study the material
from at least one of the following textbooks:
- R. Baker, H. Li, D.Boyce. CMOS Circuit Design, Layout and Simulation, IEEE
Press, New York, 2005, ISBN 0-7803-3416-7. Chapter 21.1, 21.3, and 21.4.1,
pp.463-484.
- Ph. E. Allen, D. R. Holberg, and Allen. CMOS Analog Circuit Design, Oxford
University Press, Inc., 2002. ISBN 0-19-511644-5, Chapter 4.6, pp. 153-159.
- F. Maloberti. Analog design for CMOS VLSI Systems. Kluwer Academic
Publishers, 2003, eBook ISBN: 0-306-47952-4, Print ISBN: 0-7923-7550-5,
Chapter 4.3 and 4.4, pp.196-215.
The next step in the learning process is to study the examples and complete the
experiments, which are presented in Guided exercise 4 and Non-guided exercise 3.
After that you can go on to the next module : CMOS single stage amplifiers

CMOS Analog IC
Emil D. Manolov, TU-Sofia CMOS Biasing Circuits 50