PPT
PPT
ABSTRACT
INTRODUCTION
PROBLEMS IN EXISTING TOPOLOGY
PROPOSED TOPOLOGY
REFERENCES
ABSTRACT
Use of Multilevel Inverter(MLI)s in medium and high power applications are
increasing due to reduced voltage stress across the switches and lower total
harmonic distortion (THD) of the output waveform. But the conventional MLIs
requires more number of switches as the level increases for reducing the THD
of the output waveform.
The new MLI inverter topology with reduced number of power electronic
components produces thirteen level output voltage using only 9 switches and a
diode. For generating thirteen level output voltage conventional Hbridge MLI
uses 12 switches, which increase the cost as well as switching losses.
An induction motor fed from the proposed MLI is simulated in
MATLAB/SIMULINK environment and the corresponding results are
presented.
INTRODUCTION
INVERTER INVERTER
Active Switches 2(n-1) 2(n-1) 2(n-1)
Clamping Diodes (n-1)(n-2) 0 0
Dc bus capcitors (n-1) (n-1) (n-1)/2
Balancing 0 (n-1)(n-2)/2 0
capacitors per
phase
Voltage Average High Very small
unbalancing
Motor drive Motor drive Motor drive
Applications system,STATC system,STATCO system,PV,Fuel
OM M cells.battery
system
The conventional H-bridge VSI produces a square wave output
voltage waveform which contains infinite number of odd harmonics
to obtain the sine wave output we prefer PWM based H-Bridge
inverter.
MODULATION TECHNIQUES
The level shifted pulse width modulation technique has three types
1.In Phase disposition
2. Phase disposition opposition
3. Alternate phase opposition disposition
In Phase Disposition all the carrier signals are in same phase.
In Phase Opposition Disposition all the carrier signals above the
zero are out of phase with those below the zero by 180.
In Alternate Phase Opposition Disposition all the adjacent carrier
signals are out of phase by 180.
EXSISTING TOPOLOGY
VOLT
GE S1 S2 S3 S4 S5 S6 S7 S8 S9 S1 S1 S1
LEVE 0 1 2
L
+Vdc 1 1 0 0 0 0 0 0 0 0 0 0
+2Vd 1 1 0 0 1 1 0 0 0 0 0 0
c
+3Vd 1 1 0 0 1 1 0 0 1 1 0 0
c
0 0 0 0 0 0 0 0 0 0 0 0 0
-Vdc 0 0 1 1 0 0 0 0 0 0 0 0
-2Vdc 0 0 1 1 0 0 1 1 0 0 0 0
-3Vdc 0 0 1 1 0 0 1 1 0 0 1 1
CONVENTIONAL H-BRIDGE
H-BRIDGE USING SPWM
SPWM FOR SYMMETRIC MLI(7 LEVEL)
OUTPUT VOLTAGE WAVEFORM
ASYMMETRICAL H- BRIDGE MULTILEVEL INVERTER
SWICHING PATTERN FOR ASYMMETRICAL CONVENTIONAL H
VOLTA
GE S S2 S3 S4 S5 S6 S7 S8 S9 S1 S1 S1
LEVEL 1 0 1 2
+Vdc 1 1 0 0 0 0 0 0 0 0 0 0
+2Vdc 0 0 0 0 1 1 0 0 0 0 0 0
+3Vdc 0 0 0 0 0 0 0 0 1 1 0 0
+4Vdc 1 1 0 0 0 0 0 0 1 1 0 0
+5Vdc 0 0 0 0 1 1 0 0 1 1 0 0
+6Vdc 1 1 0 0 1 1 0 0 1 1 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0
-Vdc 0 0 1 1 0 0 0 0 0 0 0 0
-2Vdc 0 0 0 0 0 0 1 1 0 0 0 0
-3Vdc 0 0 0 0 0 0 0 0 0 0 1 1
-4Vdc 0 0 1 1 0 0 0 0 0 0 1 1
-5Vdc 0 0 0 0 0 0 1 1 0 0 1 1
-6Vdc 0 0 1 1 0 0 1 1 0 0 1 1
ASYMMETRICAL MLI(13LEVEL)
ASYMMETRIC H-BRIDGE OUTPUT VOLTAGE
WAVEFORM
THD ANALYSISFOR CONVENTIONAL
H-BRIDGE
PROPOSED SYMMETRICAL
H- BRIDGE MULTILVEL SWITCHING PATTERN FOR PROPOSED
INVERTER SYMMETRICAL MLI
PROPOSED SYMMETRIC MLI(7 LEVEL)
PROPOSED SYMMETRIC OUTPUT WAVEFORM
PROPOSED ASYMMETRICAL SWITCHING PATTERN FOR
H- BRIDGE MULTILEVEL PROPOSED ASYMMETRICAL MLI
INVERTER
PROPOSED ASYMMETRIC MLI(13 LEVEL)
PROPOSED ASYMMETRIC OUTPUT WAVEFORM
THD ANALYSIS FOR
PROPOSED MLI
PD 16.11 8.89