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Cisc Vs Risc

CISC processors were popular in the 1970s-1980s due to expensive, low capacity memory. CISC designs packed complex instructions into each to reduce program size and memory usage. However, this led to complex hardware, variable instruction lengths and slower execution. RISC designs simplified the instruction set and hardware to directly execute fixed-length instructions faster, though programs required more instructions. While CISC codes were shorter, RISC execution was faster due to simpler operations being register-based rather than memory.

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142 views14 pages

Cisc Vs Risc

CISC processors were popular in the 1970s-1980s due to expensive, low capacity memory. CISC designs packed complex instructions into each to reduce program size and memory usage. However, this led to complex hardware, variable instruction lengths and slower execution. RISC designs simplified the instruction set and hardware to directly execute fixed-length instructions faster, though programs required more instructions. While CISC codes were shorter, RISC execution was faster due to simpler operations being register-based rather than memory.

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ashishkkr
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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CISC motivation in 1970s and

early 1980s
1970s and early 1980s, processors predominantly
followed the CISC designs.
Several factors contributed to the popularity of
CISC in the 1970s
In those days, memory was very expensive and
small in capacity. So there was a need to minimize
the amount of memory required to store a
program. An implication of this requirement is that
each processor instruction must do more, leading
to complex instruction set designs.

These designs caused another problem. How


could a processor be designed that could execute
such complex instructions using the technology
of the day? Complex instructions meant complex
hardware, which was also expensive. Wilkes
proposed microprogrammed control in the early
1950s. A microprogram is a small run-time
interpreter that takes the complex instruction
and generates a sequence of simple instructions
that can be executed by the hardware. Thus the
hardware need not be complex.
RISC designs, on the other hand, eliminate the
microprogram layer and use the hardware to
directly execute instructions.

RISC VS
The designers wondered
CISC why a machine needed

an extensive set of complex instructions when only


about 20% of the instructions were used most of
the time.
about 80% of the instructions generated and
executed used only 20% of an instruction set.
question led to the development of RISC
machines
RISC machines are so named because they originally offered a smaller instruction set as compared
to CISC machines.
The original idea was to provide a set of minimal instructions that could carry out all
essential operations: data movement,
ALU operations, and branching. Only explicit load

RISC VS CISC> CISC


SHORTCOMINGS
Complex
instruction set designs were motivated
by the high cost of memory.
Having more complexity packed into each
instruction meant that programs could be
smaller, thus occupying less storage.
CISC architectures include a large number of
instructions that directly access memory.
(instruction length increases if an operand is in
memory as opposed to in a register.)
This resulted in variable-length set of
instructions, which results in a varying number
of clock cycles per instruction. This again leads
to problems in instruction scheduling and

RISC VS CISC> CISC


SHORTCOMINGS
instructions that access memory,
require
hundreds
of
cycles. >>
longer execution time.
RISC
designs,
eliminate
the
microprogram layer and use the
hardware
to
directly
execute
instructions.

CISC
Examples of CISC Processors: Intel x86.
Performance was improved by allowing the simplification of
program compilers as more advanced instructions are
available.
Complex inst.>>>> direct addition between data in two
memory locations.
advanced instructions leads to complex processor >>
expensive hardware.
More inst.>>> more specialized addressing modes and
variable length instruction codes. (Uses instruction of variable
size)
variable length instruction codes. >>Instruction pipelining
can not be implemented easily.
Execution speed is slower as most operations are memory

RISC
Examples of RISC Processors: Atmel AVR, PIC, ARM
Small set of instructions. >> Total size of program is large as many
instructions are required to perform a task. This is because
instructions are simple
simple instructions >> RISC chips requires fewer transistors to
produce processors.
Addressing modes are simplified. length of the instruction codes is
fixed.
Fixed length instruction codes >> Instruction pipelining can be
implemented easily.
Only LOAD/STORE instructions can access memory
Compiler design is complex
Execution speed is faster as most operations are register based
RISC systems assume that the required operands are in the
processors internal registers, not in the main memory.

RISC Machines versus CISC Machines

Suppose we want to compute the


product, 5 X10. The code on a CISC machine
might look like this:
mov ax, 10
mov bx, 5
mul bx, ax
RISC ISA has no multiplication instructions.
Thus, on a RISC system our multiplication
problem would look like this:
mov ax, 0
mov bx, 10
mov cx, 5
Begin: add ax, bx

The CISC code, although shorter, requires more


clock cycles to execute. Suppose that on each
architecture, register-to-register moves,
addition, and loop operations each consume
one clock cycle. Suppose also that a
multiplication operation requires 30 clock
cycles. 1 Comparing the two code fragments we
have:
CISC instructions:
Total clock cycles = (2 movs X1 clock cycle) +
(1 mul X30 clock cycles)
= 32 clock cycles
RISC instructions:
Total clock cycles = (3 movs X1 clock cycle) +
(5 adds X1 clock cycle) + (5 loops X1 clock

Add to this the fact that RISC


clock cycles are often shorter
than CISC clock cycles, and it
should be clear that even though
there are more instructions, the
actual execution time is less for
RISC than for CISC. This is the main
inspiration behind the RISC design.

Characteristics of CISC and RISC processors

RIS
C
Designers make choices based on the
available technology. As the technology
(both hardware and software) evolves,
design choices also evolve.
The RISC proposal was a response to
the
changing
technology.
CISC
processors were designed to simplify
compilers and to improve
performance under constraints such as
small and slow memories.

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