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Measurement and Evaluation of Power Analysis Attacks On Asynchronous S-Box

The Asynchronous S-Box is designed using Advanced Encryption Standard that is capable of being resistant to SCA. This asynchronous S-Box is based on self-time logic referred to as null convention logic (NCL).

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kdeepikakumar
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23 views9 pages

Measurement and Evaluation of Power Analysis Attacks On Asynchronous S-Box

The Asynchronous S-Box is designed using Advanced Encryption Standard that is capable of being resistant to SCA. This asynchronous S-Box is based on self-time logic referred to as null convention logic (NCL).

Uploaded by

kdeepikakumar
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PPTX, PDF, TXT or read online on Scribd
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Measurement and Evaluation of Power

Analysis Attacks on Asynchronous


S-Box
Guided By
Mr.J.Reuban Daniel

Batch Members:
K. Deepika(12610106008)
K. Kala Rani(12610106013)
R. Usha(12610106051)
1

ENCRPTION
INPUT

OUTPUT

MUX

MUX

RE-ORDERED
NORMAL
BASIS

AFFINE
TRANSFORMATION

DECRPTION
INPUT

OUTPUT

INVERSE
AFFINE
TRANSFOR
-MATION

MUX

MUX

REORDERED
NORMAL
BASIS
3

AFFINE TRANSFORMATION
module affine(input[7:0]i,
output[7:0]q);

assign q[0]
assign q[1]
assign q[2]
assign q[3]
assign q[4]
assign q[5]
assign q[6]
assign q[7]
endmodule

=
=
=
=
=
=
=
=

(i[0] ^ i[4]) ^ (i[5] ^ i[6]) ^ (i[7] ^ 1'b1);


i[1] ^ i[5] ^ i[7] ^ i[0] ^ 1'b1;
i[2] ^ i[6] ^ i[7] ^ i[0] ^ i[1];
i[3] ^ i[7] ^ i[0] ^ i[1] ^ i[2];
i[4] ^ i[0] ^ i[1] ^ i[2] ^ i[3];
i[1] ^ i[5] ^ i[2] ^ i[3] ^ i[4] ^ 1'b1;
i[6] ^ i[2] ^ i[3] ^ i[4] ^ i[5] ^ 1'b1;
i[7] ^ i[3] ^ i[4] ^ i[5] ^ i[6];

Null Conventional Logic


module ncl_mux(input a,b,s,
output reg z);
reg a0,a1,b0,b1,s0,s1,c0,c1,c2,z0,z1;
always@(a,b,s,a0,a1,b0,b1,s0,s1,c0,c1,c2,z0,z1)
begin
if(a==1'b0)
begin
a0 = 1'b1;
a1 = 1'b0;
end
if(a==1'b1)
begin
a0 = 1'b0;
a1 = 1'b1;
end

contd..

if(a==1'bX)
begin
a0 = 1'b0;
a1 = 1'b0;
end
if(b==1'b0)
begin
b0 = 1'b1;
b1 = 1'b0;
end
if(b==1'b1)
begin
b0 = 1'b0;
b1 = 1'b1;
end
if(b==1'bX)
begin
b0 = 1'b0;
b1 = 1'b0;
end

contd..

if(s==1'b0)
begin
s0 = 1'b1;
s1 = 1'b0;
end
if(s==1'b1)
begin
s0 = 1'b0;
s1 = 1'b1;
end
if(s==1'bX)
begin
s0 = 1'b0;
s1 = 1'b0;
end

contd.

c0 = ((a0 & b0) | (a1 & b0) |


(a0 & b1) | (a1 & b1));
c1 = ((s1 & s0) | (s0 & a0) | (s1
& b0));
c2 = ((s1 & s0) | (s0 & a1) | (s1
& b1));
z0 = c0 & c1;
z1 = c0 & c2;
if(z0==1'b0 && z1==1'b1)
begin
z = 1'b1;
end
else if(z0==1'b1 &&
z1==1'b0)
begin
z = 1'b0;

INVERSE AFFINE TRANSFORMATION


module inv_affine(input[7:0]i,
output[7:0] q);

assign q[0]
assign q[1]
assign q[2]
assign q[3]
assign q[4]
assign q[5]
assign q[6]
assign q[7]
endmodule

=
=
=
=
=
=
=
=

i[2]
i[0]
i[1]
i[2]
i[1]
i[2]
i[0]
i[1]

^
^
^
^
^
^
^
^

i[5]
i[3]
i[4]
i[5]
i[3]
i[4]
i[3]
i[4]

^
^
^
^
^
^
^
^

i[7] ^ 1'b1;
i[6];
i[7] ^ 1'b1;
i[0];
i[6];
i[7];
i[5] ^ 1'b1;
i[6];

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