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Unconditional Jump Instructions

The document discusses different types of program control instructions including unconditional jumps, conditional jumps, procedures, interrupts, and other useful instructions. Unconditional jumps skip sections of code and branch to any memory location. Conditional jumps allow decisions based on numerical tests of flag bits. Procedures are reusable sections of code called with CALL and returned from with RET. Interrupts pause normal program flow to run interrupt service procedures in response to hardware or software events. Other discussed instructions include NOP for delays, HLT to stop execution, and WAIT to pause for coprocessor tasks.

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126 views13 pages

Unconditional Jump Instructions

The document discusses different types of program control instructions including unconditional jumps, conditional jumps, procedures, interrupts, and other useful instructions. Unconditional jumps skip sections of code and branch to any memory location. Conditional jumps allow decisions based on numerical tests of flag bits. Procedures are reusable sections of code called with CALL and returned from with RET. Interrupts pause normal program flow to run interrupt service procedures in response to hardware or software events. Other discussed instructions include NOP for delays, HLT to stop execution, and WAIT to pause for coprocessor tasks.

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Program Control Instructions

The program control instructions direct the flow of a program and allow the flow to change.
Unconditional Jump
Conditional Jump
Unconditional Jump Instructions:
It skips sections of a program and branch to any part of a memory for the next instruction.
e.g. SHORT JUMP, NAER JUMP, FAR JUMP
Conditional Jump Instructions:
It allows to make decisions based upon numerical tests. The results of numerical test are hold in the
flag bits, which are then tested by conditional jump instructions.
e.g. first {CMP or TEST} then check flag registers {CF, PF, ZF, SF, OF}
Unconditional Jump (JMP)
Short Jump
2-byte instruction
Jumps or branch to memory
locations with in +127 and
-128

Near Jump
3-bytes instruction
Jumps or branch to memory
locations with in 32K
OFFSET address
Intrasegment jumps
Range 0000H-FFFFH

Far Jump
5-bytes instruction
Jumps or branch to any
memory location with in real
memory system
SEGEMNT address : OFFSET
address

Short

Near

Far

FAR PTR Directive (FAR used as label) indicates a far jump.


External Directive (EXTERN), appear in a programs having more then one program files.

Jumps with Registers operands: copies the contents

Indirect Jumps using an Index: it use the [] form

of AX register into the IP when instruction jump occurs.

of addressing to directly address the jump table.

Conditional Jumps: it tests flag bits sign (S), zero (Z), carry (C), parity (P), and overflow (O).
If the condition under test is true, a branch to the label associated with the jump instructions occur.
If condition is false, the next sequential instruction (step) in the program is executed.

LOOP: its a combination of CX and JNZ conditional


Jump. LOOP decrements CX; if CX!=0, it jumps to the
address indicated by the label, if CX becomes 0, the
next sequential instructions executes.

PROCEDURES (subroutine, method or function):


A group of instructions that usually performs one tasks.
It is a reusable section of the software.
CALL instruction links the procedure
RET (return) instruction returns from procedure
The stack stores the return address whenever a
procedure is called during the execution of a program.
CALL instruction pushes the address of the
instruction following the CALL.
RET instruction removes an address from the stack
so program returns to the instruction following CALL.

CALL instruction transfers the flow of the


program to the procedure.
Near CALL (OPCODE = C3)
FAR CALL (OPCODE = CB)

INTERRUPTS:
An interrupt is either a
Hardware-generated CALL (externally derived from a hardware signal)
Software-generated CALL (internally derived from the execution of an instruction or by some
internal event).
Either type interrupts the program and calls an Interrupt Service Procedure (ISP) or
interrupt handler.
Interrupt Vector: contains the address of an interrupt service procedure. It is a 4-byte number
stored in the first 1024 bytes of memory (00000H-003FFH) when the microprocessor operated in
the real mode. There are 256 different interrupt vectors.

Interrupt Instructions:
Three interrupt instructions are available to the programmer, INTs, INT0 and INT3.
Each instruction fetches a vector from a vector table.
And then calls a procedure stored at location addressed by the vector.

INTs:
Each INT instruction has a numeric operand whose range is 0-255 (00H-FFH).
For Example INT 100 uses interrupt vector 100, which appears at memory address 190H-193H.
The address can be calculated by multiplying the interrupt type number by 4.
For example: INT 10H instruction calls the interrupt service procedure whose address is stored
beginning at location 40H (10H x 4) in the real mode.
INTs is 2-bytes long. 1-byte contains the opcode and 2-byte contains the vector type number.
When a software interrupt instruction executes, it
pushes the flags onto the stack
Clears T and I flag bits
[STI (set interrupt flag) and CLI (clear interrupt flag)]
pushes CS on the stack
Fetches new value for CS from vector table
pushes IP onto stack
Fetches new value for IP from vector table
Jumps to the new location addressed by CS and IP

IRET: Interrupt return instruction (IRET) is only used with software and hardware interrupt
procedure. It
POP stack data back into the IP
POP stack data back into the CS
POP stack data back into the flag register
It restores the contents of I and T from stack
Some Useful instructions:
Controlling the Carry Flag Bit: It can also detects in assembly language procedures.
Three instructions controls the contents of carry flag: STC (set carry), CLC (clear carry) and
CMC (complement carry).
Indicates an error upon return from procedure.
WAIT: It monitors the hardware pin TEST on the 8086/8088. if the WAIT instruction executes
while the TEST pin = 1, nothing happens and the next instruction executes. If the WAIT
instruction executes while TEST pin = 0, the microprocessor waits for the TEST pin to return to a
logic 1. It inputs a buzzy condition when at logic 0 level. This pin is connected to the TEST pin of
numeric coprocessor 8087. It allows the P to wait until coprocessor finishes a task.
HLT: It stops the execution of software.
NOP: (NO operation). It used for applications in time delays to waste time.

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