Electronics Based On 2D Materials

Electronics based on 2D
Materials
BHAGDIKAR SHARANG
14D100018
RAMAMOORTHY SHYAM
140070042
Abstract
The compelling demand for higher performance and lower power consumption in
electronic systems is the main driving force of the electronics industrys quest for
devices and architectures based on new materials. The shrinking of the
geometrical dimensions of planar devices, plus the introduction of additional
performance boosters such as strain, high-k gate dielectrics and metal gates, have
been successful approaches for improving transistor performance in the past 60
years. However these methods have several limitations which curtail the minimum
size we can achieve. As we advance into the nanometer range, issues like leakage,
low mobility, and short channel effects become prominent and start affecting the
device performance adversely. Sustaining Moores law has therefore required, in
the past 10 years, the adoption of new device geometries and of new materials.
One of the most promising approaches towards tackling this issue is employing 2D
materials for fabricating transistor channels. Two-dimensional materials (2DMs),
that is, transition metal dichalcogenides (TMDs), Bi2Se3 and Bi2Te3, as well as
graphene, provide the option of ultimate thin channel transistors and the
opportunity for new device concepts. In this review, we will discuss the prospects
and challenges as well as the current status of the most promising 2DM devices.
Enhanced gate
control
Thin Gate Oxide
Higher Substrate
Doping
Mobility
Degradation
Leakage Power
Traditional Scaling
Scaling Advanced Solutions
Nanowire FET
FINFET
Why 2DM?
Two-dimensional materials (2DMs), that is, transition metal dichalcogenides

(TMDs), Bi2Se3 and Bi2Te3, as well as graphene, provide the option of
ultimate thin channel transistors and the opportunity for new device
concepts.
The ability to control the channel thickness at the atomic level translates into
improved gate control over the channel barrier and into reduced shortchannel effects, which are one of the main issues in ultrascaled devices,
together with high fabrication costs and power consumption.
The main opportunities for 2DMs for both high-performance and low-power
applications stem from the ultimate thinness achievable in 2DM-based
devices, which lead to an almost perfect control of the channel potential.
2DMs have the potential to create completely new markets for the
electronics industry, rather than competing with or trying to displace existing
well-established technologies to provide higher performance.
Understanding the Device Physics
Transistor as a switch
Whenever Vgs = 0, the switch is off and current through the device is Ioff.
For Vgs = Vdd, switch is on and current flowing through is Ion.
At best, Ids increases exponentially from Ioff to Ion, with a rate described by the
so-called subthreshold slope (SS) i.e. the inverse slope of the curve shown.
Dynamic power consumption of a CMOS integrated circuit is proportional to f.C.

(Vdd)^2
Delay time (), defined as = CVDD/Ion; this parameter is linked to the time
required to switch a logic gate.
For analog applications, the main FoM are represented by the cut-off
frequency (fT) and the maximum oscillation frequency (fmax).
CHALLENGES FOR DEVICE DESIGN:
Maximize Ion/Ioff i.e. attain highest switching speed at lowest power leakage.
The smaller the SS, the better the transistor behaves as a switch.
A reduction in Dynamic power is beneficial both for longer battery duration

and for ease of heat dissipation.
Performance vs Power trade off.
For analog applications, To improve fmax, the series resistance needs to be

reduced and large rd has to be achieved.
2DM Devices
TMD FET (MoS2)
Strengths
Weaknesses
High Ion/Ioff (>10^4) and low SS (<80

mVdec)
Ultimate thin body boosts device
scaling prospects
Larger effective mass of carriers in
ballistic regimes.
Smaller delay
Low mobility as compared to silicon

or III-V channels.
Threats
Opportunities
For long (>m) channel devices,

graphene inverters outperform
inverters based on MoS2.
Experimental results on MoS2 FETs are
far worse than state-of-the-art CMOS
invertors in terms of intrinsic delay
time.
Theoretical results for MoS2 FETs

with gate lengths of 8.1 and 5.9 nm
are promising
Device optimization and fabrication
for high-frequency operation have
not been addressed yet.
2DM TFET for low power devices

Strengths
Weaknesses
Two dimensional materials provide a

fully terminated surface, free of
dangling bonds which are detrimental
to SS.
There are many TMDs with energy
bandgaps in the range of interest
(~12 eV) for scaled low-power devices.
Internal fields greatly exceeding the
limits of bulk tunnel junctions are
feasible, allowing much higher current
densities.
Tunnel junctions in bulk

semiconductors are often defined
by forming abrupt pn junctions.
Appropriate n and
p-type dopants still need to be
identified and studied
Threats
Opportunities
Fabrication of doped tunnel junctions.

Design of new device architectures
The possibility of having symmetric

conduction and valence bands in
2DMs such as graphene = new device
concepts.
Using adsorbates or native chalcogen
vacancies instead of p-n junction for
charge transfer doping
Graphene FET for analog operations

Strengths
Weaknesses
Graphene has shown the highest

and saturation velocity of any FET
channel material so far.
The limit of fT, well beyond 1 THz, has
been predicted through simulation
The highest reported fmax of a

graphene transistor is 90 GHz
whereas InP transistors have
achieved 1.2 THz.
Absence of a bandgap in graphene
prevents proper current saturation
Threats
Opportunities
2DMs such as MoS2 show pronounced

current saturation and therefore could
provide a good alternative to grapheme
Introducing a bandgap in graphene is

a promising route
A reduction of the still large parasitic
effects in these devices is urgently
needed to increase fmax
Comparision
Although each device has its own set of pros and cons, experimental and
theoretical data have shown that MoS2 FETs hold promise for the future.
Transition metal dichalcogenides have strong potential for UTB-FETs for lowpower applications where their strength relies on the high Ion/Ioff ratio as
compared to graphene or traditional CMOS.
Considering digital electronic applications, graphene field-effect transistors

(FETs) cannot comply with ITRS requirements because of the zero bandgap,
which leads to at most a few tens Ion/Ioff ratio, and large Ioff.
The main specific advantage of TMDs over graphene is the existence of a gap
that is in the range ~12 eV for most of them, which ensures that they behave
as switches with low Ioff.
2DMs such as MoS2 show pronounced current saturation and therefore could
provide a good alternative to graphene in analog applications.
Further Options Graphene Bilayer TFET
In a TFET, band to band tunneling can be controlled using the Gate-Source

voltage.
Unlike MOSFET, there is no thermoionic emission of carriers, instead carriers

tunnel from bands directly.
ADVANTAGES
Can achieve much lower SS (<60mV/dec), high Ion/Ioff.
Nanoribbons not needed, so edge disordering will not be a problem.
The small bandgap opened by a vertical field applied across the two layers is
sufficient to suppress band-to-band tunneling in the off-state and thus
enables effective switch-off.
References
Nature Nanotechnology Review Article: Graphene Transistors Frank

Schwierz http://
www.nature.com/nnano/journal/v5/n7/full/nnano.2010.89.html
Nature Nanotechnology Review Article: Electronics based on 2d Materials

http://www.nature.com/nnano/journal/v9/n10/full/nnano.2014.207.html

Electronics Based On 2D Materials

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Electronics based on 2D

Thin Gate Oxide

Scaling Advanced Solutions

Two-dimensional materials (2DMs), that is, transition metal dichalcogenides

Understanding the Device Physics

For Vgs = Vdd, switch is on and current flowing through is Ion.

Dynamic power consumption of a CMOS integrated circuit is proportional to f.C.

CHALLENGES FOR DEVICE DESIGN:

A reduction in Dynamic power is beneficial both for longer battery duration

Performance vs Power trade off.

For analog applications, To improve fmax, the series resistance needs to be

High Ion/Ioff (>10^4) and low SS (<80

Low mobility as compared to silicon

For long (>m) channel devices,

Theoretical results for MoS2 FETs

2DM TFET for low power devices

Two dimensional materials provide a

Tunnel junctions in bulk

Fabrication of doped tunnel junctions.

The possibility of having symmetric

Graphene FET for analog operations

Graphene has shown the highest

The highest reported fmax of a

2DMs such as MoS2 show pronounced

Introducing a bandgap in graphene is

Considering digital electronic applications, graphene field-effect transistors

Further Options Graphene Bilayer TFET

In a TFET, band to band tunneling can be controlled using the Gate-Source

Unlike MOSFET, there is no thermoionic emission of carriers, instead carriers

Can achieve much lower SS (<60mV/dec), high Ion/Ioff.

Nanoribbons not needed, so edge disordering will not be a problem.

Nature Nanotechnology Review Article: Graphene Transistors Frank

Nature Nanotechnology Review Article: Electronics based on 2d Materials

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