Vlsi Design, Test and Manufacturability: Kalasalingam University-Tessolve
Vlsi Design, Test and Manufacturability: Kalasalingam University-Tessolve
MANUFACTURABILITY
KALASALINGAM UNIVERSITY- TESSOLVE
4/12/16
Gate
Behavioral
DFT
Synthesis
Technology
Mapping
Layout
RTL Description
Libraries
Parameter
Extraction
Logic
DFT
Synthesis
Libraries
Manufacturing
Gate Description
Product
Test Pattern
Generation
low
Fault
Coverage?
Test Application
high
Good Product
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Introduction
Integrated Circuits (ICs) have
Moores
VLSI
M LSI
S
S S
I I
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Importance of Testing
Moores
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0
0
0
0
0/
1
Related fields
Verification: To verify the correctness of a design
Diagnosis: To tell the faulty site.
Reliability: To tell whether a good system will work
Debug: To find the faulty site and try to eliminate the fault.
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Why Testing?
Economics!
Reduce test cost (enhance profit)
Automatic test equipment (ATE) is extremely
expensive
Shorten time-to-market
Market dominating or sharing
Guarantee IC quality and reliability
Rule of Ten:
Education
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Principle of Testing
Input Patterns
-1011
11-00
-0-101--0
0-101
Stored
Correct
Response
Output Response
Circuit
under
Test
(CUT)
1-001
0011-1101
100101-11
Comparator
Test Result
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Types of Testing
Verification testing, characterization testing
Verifies correctness of design and correctness of test
procedure
May require correction of either or both
Manufacturing testing
Factory testing of all manufactured chips for parametric
and logic faults, and analog specifications
Burn-in or stress testing
Acceptance testing (incoming inspection)
User (customer) tests purchased parts to ensure quality
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How to do testing
From designers point of view:
Circuit modeling
Fault modeling
Modeling
Logic simulation
Fault simulation
Test generation
Testable design
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Shipped Parts
Testing
Yield:
Fraction of
good parts
Rejects
Quality:
Defective parts
per million (DPM)
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Wafer Testing
Wafer testing is a step performed during semiconductor device
fabrication.
The wafer testing is performed by a piece of test equipment called a
wafer prober. The process of wafer testing can be referred to in several
ways: Wafer Final Test (WFT), Electronic Die Sort (EDS) and Circuit
Probe (CP) are probably the most common.
In-line Parametric Test (a.k.a. wafer electrical test, WET)
In-line test structure
In-line test type
In-line test data explain
In-line test equipment
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Probe Testing
Wafer probes: Most manufacturers provide wafers already probed to a set of DC
parameters at room temperature to ensure they meet a basic subset of the package-part
specification.
Cold probe testing: Using the latest test equipment and facilities, we are able to eliminate
moisture and ice formation by probing wafers in a dry precision-controlled environment
that lets us analyze die performance under simulated conditions as cold as -65C.
Hot probe testing: The capacity of semiconductors to operate problem-free under adverse
high-temperature conditions is critically important for many high-reliability applications,
especially in the military, aerospace and medical industries. To ensure that components
meet those stringent standards, we can run wafer-probe tests to identify and select those
bare die that perform reliably under high temperatures, even up to 200C.During the tests,
each die is data-logged and characterized.
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Die Testing
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While studying the programme, Stipend will be provided for the meritious students
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QUERIES?
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KALASALINGAM UNIVERSITY
KALASALINGAM
TESSOLVE SEMICONDUCTOR
UNIVERSITY
PVT.LTD
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Thank you
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