ADDRESSING MODES

&
Instruction set

8086
Microprocessor

Introduction
Program
A set of instructions written to solve
a problem.
Instruction
Directions which a microprocessor
follows to execute a task or part of a
task.

Computer language

High Level

Low Level

Machine Language
Binary bits

Assembly Language

English Alphabets
Mnemonics
Assembler
Mnemonics Machine
2
Language

ADDRESSING MODES

8086
Microprocessor

Addressing Modes

Every instruction of a program has to operate on a data.

The different ways in which a source operand is denoted
in an instruction are known as addressing modes.
1. Register Addressing
2. Immediate Addressing

Group I : Addressing modes for

register and immediate data

3. Direct Addressing
4. Register Indirect Addressing
5. Based Addressing
6. Indexed Addressing

Group II : Addressing modes for

memory data

7. Based Index Addressing

8. String Addressing
9. Direct I/O port Addressing
10. Indirect I/O port Addressing

Group III : Addressing modes for

I/O ports

11. Relative Addressing

Group IV : Relative Addressing mode

12. Implied Addressing

Group V : Implied Addressing mode

5

8086
Microprocessor

Addressing Modes

Group I : Addressing modes for

register and immediate data

1.

Register Addressing

2.

Immediate Addressing

The instruction will specify the name of the

register which holds the data to be operated by
the instruction.

3.

Direct Addressing

Example:

4.

Register Indirect Addressing

5.

Based Addressing

6.

Indexed Addressing

The content of 8-bit register DH is moved to

another 8-bit register CL

7.

Based Index Addressing

(CL) (DH)

8.

String Addressing

9.

Direct I/O port Addressing

MOV CL, DH

10. Indirect I/O port Addressing

11. Relative Addressing
12. Implied Addressing

8086
Microprocessor

Addressing Modes

Group I : Addressing modes for

register and immediate data

1.

Register Addressing

2.

Immediate Addressing

3.

Direct Addressing

4.

Register Indirect Addressing

5.

Based Addressing

6.

Indexed Addressing

The 8-bit data (08H) given in the instruction is

moved to DL

7.

Based Index Addressing

(DL) 08H

8.

String Addressing

9.

Direct I/O port Addressing

10. Indirect I/O port Addressing

In immediate addressing mode, an 8-bit or 16-bit

data is specified as part of the instruction
Example:
MOV DL, 08H

MOV AX, 0A9FH

The 16-bit data (0A9FH) given in the instruction is
moved to AX register

11. Relative Addressing

12. Implied Addressing

(AX) 0A9FH

8086
Microprocessor

Addressing Modes : Memory Access

20 Address lines 8086 can address up to

220 = 1M bytes of memory
However, the largest register is only 16 bits
Physical Address will have to be calculated
Physical Address : Actual address of a byte in
memory. i.e. the value which goes out onto the
address bus.
Memory Address represented in the form
Seg : Offset (Eg - 89AB:F012)
Each time the processor wants to access
memory, it takes the contents of a segment
register, shifts it one hexadecimal place to the
left (same as multiplying by 1610), then add the
required offset to form the 20- bit address

16 bytes of
contiguous memory

89AB : F012 89AB 89AB0 (Paragraph to byte 89AB x 10 = 89AB0)

F012 0F012 (Offset is already in byte unit)
+ ------98AC2 (The absolute address)
9

8086
Microprocessor

Addressing Modes

1.

Register Addressing

2.

Immediate Addressing

3.

Direct Addressing

4.

Register Indirect Addressing

5.

Based Addressing

6.

Indexed Addressing

7.

Based Index Addressing

8.

String Addressing

9.

Direct I/O port Addressing

10. Indirect I/O port Addressing

11. Relative Addressing
12. Implied Addressing

Group II : Addressing modes

for memory data

Here, the effective

address of the memory
location at which the data operand is stored is
given in the instruction.
The effective address is just a 16-bit number
written directly in the instruction.
Example:
MOV
MOV

BX, [1354H]
BL, [0400H]

The square brackets around the 1354H denotes

the contents of the memory location. When
executed, this instruction will copy the contents of
the memory location into BX register.
This addressing mode is called direct because the
displacement of the operand from the segment
base is specified directly in the instruction.

11

8086
Microprocessor

Addressing Modes

1.

Register Addressing

2.

Immediate Addressing

3.

Direct Addressing

4.

Register Indirect Addressing

5.

Based Addressing

6.

Indexed Addressing

7.

Based Index Addressing

8.

String Addressing

9.

Direct I/O port Addressing

10. Indirect I/O port Addressing

11. Relative Addressing
12. Implied Addressing

Group II : Addressing modes

for memory data

In Register indirect addressing, name of the

register which holds the effective address (EA)
will be specified in the instruction.
Registers used to hold EA are any of the following
registers:
BX, BP, DI and SI.
Content of the DS register is used for base
address calculation.
Example:

Note : Register/ memory

enclosed in brackets refer
to content of register/
memory

MOV CX, [BX]

Operations:
EA = (BX)
BA = (DS) x 1610
MA = BA + EA
(CX) (MA)

or,

(CL) (MA)
(CH) (MA +1)
12

8086
Microprocessor
1.

Register Addressing

2.

Immediate Addressing

3.

Direct Addressing

4.

Register Indirect Addressing

5.

Based Addressing

6.

Indexed Addressing

7.

Based Index Addressing

8.

String Addressing

9.

Direct I/O port Addressing

10. Indirect I/O port Addressing

11. Relative Addressing
12. Implied Addressing

Group II : Addressing modes

for memory data

Addressing Modes

In Based Addressing, BX or BP is used to hold the

base value for effective address and a signed 8-bit
or unsigned 16-bit displacement will be specified
in the instruction.
In case of 8-bit displacement, it is sign extended
to 16-bit before adding to the base value.
When BX holds the base value of EA, 20-bit
physical address is calculated from BX and DS.
When BP holds the base value of EA, BP and SS is
used.
Example:
MOV AX, [BX + 08H]
Operations:
0008H 08H (Sign extended)
EA = (BX) + 0008H
BA = (DS) x 1610
MA = BA + EA
(AX) (MA)

or,

(AL) (MA)
(AH) (MA + 1)

13

8086
Microprocessor

Addressing Modes

1.

Register Addressing

2.

Immediate Addressing

3.

Direct Addressing

4.

Register Indirect Addressing

5.

Based Addressing

6.

Indexed Addressing

7.

Based Index Addressing

8.

String Addressing

9.

Direct I/O port Addressing

10. Indirect I/O port Addressing

11. Relative Addressing
12. Implied Addressing

Group II : Addressing modes

for memory data

SI or DI register is used to hold an index value for

memory data and a signed 8-bit or unsigned 16bit displacement will be specified in the
instruction.
Displacement is added to the index value in SI or
DI register to obtain the EA.
In case of 8-bit displacement, it is sign extended
to 16-bit before adding to the base value.
Example:
MOV CX, [SI + 0A2H]
Operations:
FFA2H A2H (Sign extended)
EA = (SI) + FFA2H
BA = (DS) x 1610
MA = BA + EA
(CX) (MA)

or,

(CL) (MA)
(CH) (MA + 1)

14

8086
Microprocessor

Addressing Modes

1.

Register Addressing

2.

Immediate Addressing

3.

Direct Addressing

4.

Register Indirect Addressing

5.

Based Addressing

6.

Indexed Addressing

7.

Based Index Addressing

8.

String Addressing

9.

Direct I/O port Addressing

10. Indirect I/O port Addressing

11. Relative Addressing
12. Implied Addressing

Group II : Addressing modes

for memory data

In Based Index Addressing, the effective address

is computed from the sum of a base register (BX
or BP), an index register (SI or DI) and a
displacement.
Example:
MOV DX, [BX + SI + 0AH]
Operations:
000AH 0AH (Sign extended)
EA = (BX) + (SI) + 000AH
BA = (DS) x 1610
MA = BA + EA
(DX) (MA) or,
(DL) (MA)
(DH) (MA + 1)

15

8086
Microprocessor

Addressing Modes

1.

Register Addressing

2.

Immediate Addressing

3.

Direct Addressing

4.

Register Indirect Addressing

5.

Based Addressing

6.

Indexed Addressing

7.

Based Index Addressing

8.

String Addressing

9.

Direct I/O port Addressing

10. Indirect I/O port Addressing

11. Relative Addressing
12. Implied Addressing
Note : Effective address of
the Extra segment register

Group II : Addressing modes

for memory data

Employed in string operations to operate on string

data.
The effective address (EA) of source data is stored
in SI register and the EA of destination is stored
in DI register.
Segment register for calculating base address of
source data is DS and that of the destination data
is ES
Example: MOVS BYTE
Operations:
Calculation of source memory location:
EA = (SI)
BA = (DS) x 1610
MA = BA + EA
Calculation of destination memory location:
EAE = (DI)
BAE = (ES) x 1610 MAE = BAE + EAE
(MAE) (MA)
If DF = 1, then (SI) (SI) 1 and (DI) = (DI) - 1
If DF = 0, then (SI) (SI) +1 and (DI) = (DI)
16+ 1

8086
Microprocessor

Addressing Modes

Group III : Addressing

modes for I/O ports

These addressing modes are used to access data

from standard I/O mapped devices or ports.

1.

Register Addressing

2.

Immediate Addressing

3.

Direct Addressing

In direct port addressing mode, an 8-bit port

address is directly specified in the instruction.

4.

Register Indirect Addressing

Example: IN AL, [09H]

5.

Based Addressing

6.

Indexed Addressing

Operations: PORTaddr = 09H

(AL) (PORT)

7.

Based Index Addressing

8.

String Addressing

9.

Direct I/O port Addressing

10. Indirect I/O port Addressing

11. Relative Addressing
12. Implied Addressing

Content of port with address 09H is

moved to AL register
In indirect port addressing mode, the instruction
will specify the name of the register which holds
the port address. In 8086, the 16-bit port address
is stored in the DX register.
Example: OUT [DX], AX
Operations: PORTaddr = (DX)
(PORT) (AX)
Content of AX is moved to port
whose address is specified by DX
register.

17

8086
Microprocessor
1.

Register Addressing

2.

Immediate Addressing

3.

Direct Addressing

4.

Register Indirect Addressing

5.

Based Addressing

6.

Indexed Addressing

7.

Based Index Addressing

8.

String Addressing

000AH 0AH

9.

Direct I/O port Addressing

If ZF = 1, then

10. Indirect I/O port Addressing

11. Relative Addressing
12. Implied Addressing

Group IV : Relative
Addressing mode

Addressing Modes

In this addressing mode, the effective address of

a program instruction is specified relative to
Instruction Pointer (IP) by an 8-bit signed
displacement.
Example: JZ 0AH
Operations:
(sign extend)

EA = (IP) + 000AH
BA = (CS) x 1610
MA = BA + EA
If ZF = 1, then the program control jumps to
new address calculated above.
If ZF = 0, then next instruction of the
program is executed.
18

8086
Microprocessor

Addressing Modes

1.

Register Addressing

2.

Immediate Addressing

3.

Direct Addressing

4.

Register Indirect Addressing

5.

Based Addressing

6.

Indexed Addressing

7.

Based Index Addressing

8.

String Addressing

9.

Direct I/O port Addressing

Group IV : Implied
Addressing mode

Instructions using this mode have no operands.

The instruction itself will specify the data to be
operated by the instruction.
Example: CLC
This clears the carry flag to zero.

10. Indirect I/O port Addressing

11. Relative Addressing
12. Implied Addressing

19

INSTRUCTION SET

8086
Microprocessor

Instruction Set

8086 supports 6 types of instructions.

1. Data Transfer Instructions
2. Arithmetic Instructions
3. Logical Instructions
4. String manipulation Instructions
5. Process Control Instructions
6. Control Transfer Instructions

21

8086
Microprocessor

Instruction Set
1. Data Transfer Instructions

Instructions that are used to transfer data/ address in to

registers, memory locations and I/O ports.
Generally involve two operands: Source operand and
Destination operand of the same size.
Source: Register or a memory location or an immediate data
Destination : Register or a memory location.
The size should be a either a byte or a word.
A 8-bit data can only be moved to 8-bit register/ memory
and a 16-bit data can be moved to 16-bit register/ memory.

22

8086
Microprocessor

Instruction Set
1. Data Transfer Instructions

Mnemonics:

MOV, XCHG, PUSH, POP, IN, OUT

MOV reg2/ mem, reg1/ mem

MOV reg2, reg1
MOV mem, reg1
MOV reg2, mem

(reg2) (reg1)
(mem) (reg1)
(reg2) (mem)

MOV reg/ mem, data

MOV reg, data
MOV mem, data

(reg) data
(mem) data

XCHG reg2/ mem, reg1

XCHG reg2, reg1
XCHG mem, reg1

(reg2) (reg1)
(mem) (reg1)

23

8086
Microprocessor

Instruction Set
1. Data Transfer Instructions

Mnemonics:

MOV, XCHG, PUSH, POP, IN, OUT

PUSH reg16/ mem

PUSH reg16

(SP) (SP) 2
MA S = (SS) x 1610 + SP
(MA S ; MA S + 1) (reg16)

PUSH mem

(SP) (SP) 2
MA S = (SS) x 1610 + SP
(MA S ; MA S + 1) (mem)

POP reg16/ mem

POP reg16

MA S = (SS) x 1610 + SP
(reg16) (MA S ; MA S + 1)
(SP) (SP) + 2

POP mem

MA S = (SS) x 1610 + SP
(mem) (MA S ; MA S + 1)
(SP) (SP) + 2

24

8086
Microprocessor

Instruction Set
1. Data Transfer Instructions

Mnemonics:

MOV, XCHG, PUSH, POP, IN, OUT

OUT [DX], A

IN A, [DX]
IN AL, [DX]

PORTaddr = (DX)
(AL) (PORT)

OUT [DX], AL

PORTaddr = (DX)
(PORT) (AL)

IN AX, [DX]

PORTaddr = (DX)
(AX) (PORT)

OUT [DX], AX

PORTaddr = (DX)
(PORT) (AX)

IN A, addr8

OUT addr8, A

IN AL, addr8

(AL) (addr8)

OUT addr8, AL

(addr8) (AL)

IN AX, addr8

(AX) (addr8)

OUT addr8, AX

(addr8) (AX)

25

8086
Microprocessor

Instruction Set
2. Arithmetic Instructions

Mnemonics:

ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP

ADD reg2/ mem, reg1/mem

ADC reg2, reg1
ADC reg2, mem
ADC mem, reg1

(reg2) (reg1) + (reg2)

(reg2) (reg2) + (mem)
(mem) (mem)+(reg1)

ADD reg/mem, data

ADD reg, data
ADD mem, data

(reg) (reg)+ data

(mem) (mem)+data

ADD A, data
ADD AL, data8
ADD AX, data16

(AL) (AL) + data8

(AX) (AX) +data16

26

8086
Microprocessor

Instruction Set
2. Arithmetic Instructions

Mnemonics:

ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP

ADC reg2/ mem, reg1/mem

ADC reg2, reg1
ADC reg2, mem
ADC mem, reg1

(reg2) (reg1) + (reg2)+CF

(reg2) (reg2) + (mem)+CF
(mem) (mem)+(reg1)+CF

ADC reg/mem, data

ADC reg, data
ADC mem, data

(reg) (reg)+ data+CF

(mem) (mem)+data+CF

ADDC A, data
ADD AL, data8
ADD AX, data16

(AL) (AL) + data8+CF

(AX) (AX) +data16+CF

27

8086
Microprocessor

Instruction Set
2. Arithmetic Instructions

Mnemonics:

ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP

SUB reg2/ mem, reg1/mem

SUB reg2, reg1
SUB reg2, mem
SUB mem, reg1

(reg2) (reg1) - (reg2)

(reg2) (reg2) - (mem)
(mem) (mem) - (reg1)

SUB reg/mem, data

SUB reg, data
SUB mem, data

(reg) (reg) - data

(mem) (mem) - data

SUB A, data
SUB AL, data8
SUB AX, data16

(AL) (AL) - data8

(AX) (AX) - data16

28

8086
Microprocessor

Instruction Set
2. Arithmetic Instructions

Mnemonics:

ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP

SBB reg2/ mem, reg1/mem

SBB reg2, reg1
SBB reg2, mem
SBB mem, reg1

(reg2) (reg1) - (reg2) - CF

(reg2) (reg2) - (mem)- CF
(mem) (mem) - (reg1) CF

SBB reg/mem, data

SBB reg, data
SBB mem, data

(reg) (reg) data - CF

(mem) (mem) - data - CF

SBB A, data
SBB AL, data8
SBB AX, data16

(AL) (AL) - data8 - CF

(AX) (AX) - data16 - CF

29

8086
Microprocessor

Instruction Set
2. Arithmetic Instructions

Mnemonics:

ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP

INC reg/ mem

INC reg8

(reg8) (reg8) + 1

INC reg16

(reg16) (reg16) + 1

INC mem

(mem) (mem) + 1

DEC reg/ mem

DEC reg8

(reg8) (reg8) - 1

DEC reg16

(reg16) (reg16) - 1

DEC mem

(mem) (mem) - 1

30

8086
Microprocessor

Instruction Set
2. Arithmetic Instructions

Mnemonics:

ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP

MUL reg/ mem

MUL reg

For byte : (AX) (AL) x (reg8)

For word : (DX)(AX) (AX) x (reg16)

MUL mem

For byte : (AX) (AL) x (mem8)

For word : (DX)(AX) (AX) x (mem16)

IMUL reg/ mem

IMUL reg

For byte : (AX) (AL) x (reg8)

For word : (DX)(AX) (AX) x (reg16)

IMUL mem

For byte : (AX) (AX) x (mem8)

For word : (DX)(AX) (AX) x (mem16)

31

8086
Microprocessor

Instruction Set
2. Arithmetic Instructions

Mnemonics:

ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP

DIV reg/ mem

DIV reg

For 16-bit :- 8-bit :

(AL) (AX) :- (reg8) Quotient
(AH) (AX) MOD(reg8) Remainder
For 32-bit :- 16-bit :
(AX) (DX)(AX) :- (reg16) Quotient
(DX) (DX)(AX) MOD(reg16) Remainder

DIV mem

For 16-bit :- 8-bit :

(AL) (AX) :- (mem8) Quotient
(AH) (AX) MOD(mem8) Remainder
For 32-bit :- 16-bit :
(AX) (DX)(AX) :- (mem16) Quotient
(DX) (DX)(AX) MOD(mem16) Remainder
32

8086
Microprocessor

Instruction Set
2. Arithmetic Instructions

Mnemonics:

ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP

IDIV reg/ mem

IDIV reg

For 16-bit :- 8-bit :

(AL) (AX) :- (reg8) Quotient
(AH) (AX) MOD(reg8) Remainder
For 32-bit :- 16-bit :
(AX) (DX)(AX) :- (reg16) Quotient
(DX) (DX)(AX) MOD(reg16) Remainder

IDIV mem

For 16-bit :- 8-bit :

(AL) (AX) :- (mem8) Quotient
(AH) (AX) MOD(mem8) Remainder
For 32-bit :- 16-bit :
(AX) (DX)(AX) :- (mem16) Quotient
(DX) (DX)(AX) MOD(mem16) Remainder
33

8086
Microprocessor

Instruction Set
2. Arithmetic Instructions

Mnemonics:

ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP

CMP reg2/mem, reg1/ mem

CMP reg2, reg1

Modify flags (reg2) (reg1)

If (reg2) > (reg1) then CF=0, ZF=0, SF=0
If (reg2) < (reg1) then CF=1, ZF=0, SF=1
If (reg2) = (reg1) then CF=0, ZF=1, SF=0

CMP reg2, mem

Modify flags (reg2) (mem)

If (reg2) > (mem) then CF=0, ZF=0, SF=0
If (reg2) < (mem) then CF=1, ZF=0, SF=1
If (reg2) = (mem) then CF=0, ZF=1, SF=0

CMP mem, reg1

Modify flags (mem) (reg1)

If (mem) > (reg1) then CF=0, ZF=0, SF=0
If (mem) < (reg1) then CF=1, ZF=0, SF=1
If (mem) = (reg1) then CF=0, ZF=1, SF=0
34

8086
Microprocessor

Instruction Set
2. Arithmetic Instructions

Mnemonics:

ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP

CMP reg/mem, data

CMP reg, data

Modify flags (reg) (data)

If (reg) > data then CF=0, ZF=0, SF=0
If (reg) < data then CF=1, ZF=0, SF=1
If (reg) = data then CF=0, ZF=1, SF=0

CMP mem, data

Modify flags (mem) (mem)

If (mem) > data then CF=0, ZF=0, SF=0
If (mem) < data then CF=1, ZF=0, SF=1
If (mem) = data then CF=0, ZF=1, SF=0

35

8086
Microprocessor

Instruction Set
2. Arithmetic Instructions

Mnemonics:

ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP

CMP A, data
CMP AL, data8

Modify flags (AL) data8

If (AL) > data8 then CF=0, ZF=0, SF=0
If (AL) < data8 then CF=1, ZF=0, SF=1
If (AL) = data8 then CF=0, ZF=1, SF=0

CMP AX, data16

Modify flags (AX) data16

If (AX) > data16
then CF=0, ZF=0, SF=0
If (mem) < data16 then CF=1, ZF=0, SF=1
If (mem) = data16 then CF=0, ZF=1, SF=0

36

8086
Microprocessor

Instruction Set
3. Logical Instructions

Mnemonics:

AND, OR, XOR, TEST, SHR, SHL, RCR, RCL

37

8086
Microprocessor

Instruction Set
3. Logical Instructions

Mnemonics:

AND, OR, XOR, TEST, SHR, SHL, RCR, RCL

38

8086
Microprocessor

Instruction Set
3. Logical Instructions

Mnemonics:

AND, OR, XOR, TEST, SHR, SHL, RCR, RCL

39

8086
Microprocessor

Instruction Set
3. Logical Instructions

Mnemonics:

AND, OR, XOR, TEST, SHR, SHL, RCR, RCL

40

8086
Microprocessor

Instruction Set
3. Logical Instructions

Mnemonics:

AND, OR, XOR, TEST, SHR, SHL, RCR, RCL

41

8086
Microprocessor

Instruction Set
3. Logical Instructions

Mnemonics:

AND, OR, XOR, TEST, SHR, SHL, RCR, RCL

42

8086
Microprocessor

Instruction Set
3. Logical Instructions

Mnemonics:

AND, OR, XOR, TEST, SHR, SHL, RCR, RCL

43

8086
Microprocessor

Instruction Set
3. Logical Instructions

Mnemonics:

AND, OR, XOR, TEST, SHR, SHL, RCR, RCL

44

8086
Microprocessor

Instruction Set
4. String Manipulation Instructions

String : Sequence of bytes or words

8086 instruction set includes instruction for string movement, comparison,
scan, load and store.
REP instruction prefix : used to repeat execution of string instructions
String instructions end with S or SB or SW.
S represents string, SB string byte and SW string word.
Offset or effective address of the source operand is stored in SI register and
that of the destination operand is stored in DI register.
Depending on the status of DF, SI and DI registers are automatically
updated.
DF = 0 SI and DI are incremented by 1 for byte and 2 for word.
DF = 1 SI and DI are decremented by 1 for byte and 2 for word.

45

8086
Microprocessor

Instruction Set
4. String Manipulation Instructions

Mnemonics:

REP, MOVS, CMPS, SCAS, LODS, STOS

REP
REPZ/ REPE
(Repeat CMPS or SCAS until
ZF = 0)

REPNZ/ REPNE
(Repeat CMPS or SCAS until
ZF = 1)

While CX 0 and ZF = 1, repeat execution of

string instruction and
(CX) (CX) 1

While CX 0 and ZF = 0, repeat execution of

string instruction and
(CX) (CX) - 1

46

8086
Microprocessor

Instruction Set
4. String Manipulation Instructions

Mnemonics:

REP, MOVS, CMPS, SCAS, LODS, STOS

MOVS
MOVSB

MA = (DS) x 1610 + (SI)

MAE = (ES) x 1610 + (DI)
(MAE) (MA)
If DF = 0, then (DI) (DI) + 1; (SI) (SI) +
1
If DF = 1, then (DI) (DI) - 1; (SI) (SI) - 1

MOVSW
MA = (DS) x 1610 + (SI)
MAE = (ES) x 1610 + (DI)
(MAE ; MAE + 1) (MA; MA + 1)
If DF = 0, then (DI) (DI) + 2; (SI) (SI) +
47
2

8086
Microprocessor

Instruction Set
4. String Manipulation Instructions

Mnemonics:

REP, MOVS, CMPS, SCAS, LODS, STOS

Compare two string byte or string word

CMPS
CMPSB

MA = (DS) x 1610 + (SI)

MAE = (ES) x 1610 + (DI)
Modify flags (MA) - (MAE)

CMPSW

If (MA) > (MAE), then CF = 0; ZF = 0; SF = 0

If (MA) < (MAE), then CF = 1; ZF = 0; SF = 1
If (MA) = (MAE), then CF = 0; ZF = 1; SF = 0
For byte operation
If DF = 0, then (DI) (DI) + 1; (SI) (SI) +
1
If DF = 1, then (DI) (DI) - 1; (SI) (SI) - 1
For word operation
If DF = 0, then (DI) (DI) + 2; (SI) (SI) +
48
2

8086
Microprocessor

Instruction Set
4. String Manipulation Instructions

Mnemonics:

REP, MOVS, CMPS, SCAS, LODS, STOS

Scan (compare) a string byte or word with accumulator

SCAS
SCASB

MAE = (ES) x 1610 + (DI)

Modify flags (AL) - (MAE)
If (AL) > (MAE), then CF = 0; ZF = 0; SF = 0
If (AL) < (MAE), then CF = 1; ZF = 0; SF = 1
If (AL) = (MAE), then CF = 0; ZF = 1; SF = 0
If DF = 0, then (DI) (DI) + 1
If DF = 1, then (DI) (DI) 1

SCASW

MAE = (ES) x 1610 + (DI)

Modify flags (AL) - (MAE)
If (AX) > (MAE ; MAE + 1), then CF = 0; ZF = 0; SF = 0
If (AX) < (MAE ; MAE + 1), then CF = 1; ZF = 0; SF = 1
If (AX) = (MAE ; MAE + 1), then CF = 0; ZF = 1; SF = 0

49

8086
Microprocessor

Instruction Set
4. String Manipulation Instructions

Mnemonics:

REP, MOVS, CMPS, SCAS, LODS, STOS

Load string byte in to AL or string word in to AX

LODS
LODSB

MA = (DS) x 1610 + (SI)

(AL) (MA)
If DF = 0, then (SI) (SI) + 1
If DF = 1, then (SI) (SI) 1

LODSW

MA = (DS) x 1610 + (SI)

(AX) (MA ; MA + 1)
If DF = 0, then (SI) (SI) + 2
If DF = 1, then (SI) (SI) 2

50

8086
Microprocessor

Instruction Set
4. String Manipulation Instructions

Mnemonics:

REP, MOVS, CMPS, SCAS, LODS, STOS

Store byte from AL or word from AX in to string

STOS
STOSB

MAE = (ES) x 1610 + (DI)

(MAE) (AL)
If DF = 0, then (DI) (DI) + 1
If DF = 1, then (DI) (DI) 1

STOSW

MAE = (ES) x 1610 + (DI)

(MAE ; MAE + 1 ) (AX)
If DF = 0, then (DI) (DI) + 2
If DF = 1, then (DI) (DI) 2

51

8086
Microprocessor

Instruction Set
5. Processor Control Instructions

Mnemonics

Explanation

STC

Set CF 1

CLC

Clear CF 0

CMC

Complement carry CF CF/

STD

Set direction flag DF 1

CLD

Clear direction flag DF 0

STI

Set interrupt enable flag IF 1

CLI

Clear interrupt enable flag IF 0

NOP

No operation

HLT

Halt after interrupt is set

WAIT

Wait for TEST pin active

ESC opcode mem/ reg

Used to pass instruction to a coprocessor

which shares the address and data bus
with the 8086

LOCK

Lock bus during next instruction

52

8086
Microprocessor

Instruction Set
6. Control Transfer Instructions

Transfer the control to a specific destination or target instruction

Do not affect flags

8086 Unconditional transfers

Mnemonics

Explanation

CALL reg/ mem/ disp16

Call subroutine

RET

Return from subroutine

JMP reg/ mem/ disp8/ disp16

Unconditional jump

53

8086
Microprocessor

Instruction Set
6. Control Transfer Instructions

8086 signed conditional

branch instructions

8086 unsigned conditional

branch instructions

Checks flags
If conditions are true, the program control is
transferred to the new memory location in the same
segment by modifying the content of IP

54

8086
Microprocessor

Instruction Set
6. Control Transfer Instructions

8086 signed conditional

branch instructions

8086 unsigned conditional

branch instructions

Name

Alternate name

Name

Alternate name

JE disp8
Jump if equal

JZ disp8
Jump if result is 0

JE disp8
Jump if equal

JZ disp8
Jump if result is 0

JNE disp8
Jump if not equal

JNZ disp8
Jump if not zero

JNE disp8
Jump if not equal

JNZ disp8
Jump if not zero

JG disp8
Jump if greater

JNLE disp8
Jump if not less or
equal

JA disp8
Jump if above

JNBE disp8
Jump if not below
or equal

JGE disp8
Jump if greater
than or equal

JNL disp8
Jump if not less

JAE disp8
Jump if above or
equal

JNB disp8
Jump if not below

JL disp8
Jump if less than

JNGE disp8
Jump if not
greater than or
equal

JB disp8
Jump if below

JNAE disp8
Jump if not above
or equal

JLE disp8
Jump if less than
or equal

JNG disp8
Jump if not
greater

JBE disp8
Jump if below or
equal

JNA disp8
Jump if not above
55

8086
Microprocessor

Instruction Set
6. Control Transfer Instructions

8086 conditional branch instructions affecting individual flags

Mnemonics

Explanation

JC disp8

Jump if CF = 1

JNC disp8

Jump if CF = 0

JP disp8

Jump if PF = 1

JNP disp8

Jump if PF = 0

JO disp8

Jump if OF = 1

JNO disp8

Jump if OF = 0

JS disp8

Jump if SF = 1

JNS disp8

Jump if SF = 0

JZ disp8

Jump if result is zero, i.e, Z = 1

JNZ disp8

Jump if result is not zero, i.e, Z = 1

56