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Understanding CMRR

This document discusses common-mode rejection ratio (CMRR) in differential amplifiers. It defines CMRR as the ratio of the differential gain to the common-mode gain. For an ideal op-amp, only the differential voltage is amplified while the common-mode voltage is rejected. However, in reality there will be some common-mode gain due to mismatches. The document examines how resistor mismatches in difference amplifiers can degrade the CMRR. It also explains why integrated differential amplifiers can have better CMRR than a discrete implementation using four matched resistors and an op-amp.

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221 views36 pages

Understanding CMRR

This document discusses common-mode rejection ratio (CMRR) in differential amplifiers. It defines CMRR as the ratio of the differential gain to the common-mode gain. For an ideal op-amp, only the differential voltage is amplified while the common-mode voltage is rejected. However, in reality there will be some common-mode gain due to mismatches. The document examines how resistor mismatches in difference amplifiers can degrade the CMRR. It also explains why integrated differential amplifiers can have better CMRR than a discrete implementation using four matched resistors and an op-amp.

Uploaded by

ilet09
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Razumijevanje CMRR

kod mjernih pojaala


Damir Mileta

Outline
Definitions

diferencijsko-input pojaala
zajedniki napon
zajedniki rejection ratio (CMRR)
zajedniki rejection (CMR)

CMRR za operacijska pojaala


CMRR za Difference pojaala
CMRR za instrumentacijska pojaala

Diferencijsko pojaalo
Diferencijsko pojaalo je sklop koji ima diferencijalni ulaz i pojaava
diferencijalni signal dok pri tom potiskuje zajednike signale
Tu spadaju operacijska pojaala, instrumentacijska pojaala, i diferencijska
pojaala
instrumentacijska
pojaala
operacijska
pojaala

Diferencijska
pojaala

Zajedniki napon
za diferencijsko pojaala, zajedniki napon se definira kao srednja vrijednost
dvaju ulaznih napona. [2]

V p+V n
V cm=
2
-

Vn

+
-

Vo

Vp

Zajedniki napon i diferencijalni napon


za diferencijsko pojaala, diferencijalni napon se definira kao razlikadvaju
ulaznih napona. [2]
-

IOP1

Vid

+
-

Vid/2

Vid/2

Vcm

V p+V n
V cm=
2
w here
V id
V p=V cm+
2
V id
V n=V cm2

Vout

Vout Adm Vid Acm Vcm


where
Adm Differential - mode gain
Acm Common - mode gain

Pojaanje zajednikog i diferencijalnog


napona
Idealno diferencijsko pojaava samo diferencijski napon, ne i zajedniki napon.
V+

V-

Vid 0V

+
V-

+
V+

+
-

Vb 0

Va 0

OP1
6

+
V+

Vo 0V

+
-

Vo 3.826745V

Va 1m

Vcm 0

V-

Vid 0V

+
V+

Vb 0

Vcm 1

OP1
+

Vb 0

Vs- 5

Vid 1000uV

OP1

Vs+ 5

V-

Vo 0V

Va 0

Vcm 1

CMRR and CMR


Common-Mode Rejection Ratio se definira kao odnos diferencijskog pojaanja
prema zajednikom pojaanju

Adm
CMRR
Acm
CMR se definira ovako:

CMR dB 20 log10 CMRR


CMR se CMRR esto koriste za u oba oblika

Real Op-Amp CMRR


In an operacijska pojaala, the diferencijsko pojaanja is known as the
open-loop pojaanja.
The open-loop pojaanja of an operacijska pojaala is fixed and
determined by its design

Real Op-Amp CMRR


However, there will be zajedniki pojaanja due to the following
Asymmetry in the circuit

Mismatched source and drain resistors


Transistor Mismatch
Signal source resistances
Gate-drain capacitances
zaward transconductances
Gate leakage currents

Output impedance of the tail current source


Changes with frequency due to tail current sources shunt capacitance

These issues will manifest themselves through converting zajedniki


variations to diferencijsko components at the output and variation of the
output zajedniki level. [4]

Real CMRR Example


To understand the effects CMRR can have at the output of device, lets
look at an example.
OPA376 PDS
Notice the Vcm is specified at the top of the page
Deviation from this value will induce an offset error
Remember CMRR is RTI

10

Real CMRR Example


Remember

CMR (dB ) 20 log10 (CMRR)

In reality, CMRR is measured by changing the input zajedniki napon and


observing the output change.
za an operacijska pojaala, this is usually done with composite pojaala

It is then referred-to-input by dividing by the pojaanja and can be though of as


an offset napon
From reference [3], in TI datasheets CMRR is defined as follows so that the
value is positive

Vcm
CMRR
Vos

11

Real CMRR Example


za the OPA376, CMRR(min)=76dB. Note this is really CMR!

CMR (dB ) 20 log10 (CMRR )


Vcm

76dB 20 log10
Vos
10

76
20

6309.5

Vcm
Vos

For a 1V change in common mode


1V
Vos
158.5uV
6309.5
12

CMRR of Difference pojaala


A difference pojaala is made up of diferencijsko pojaala (operacijska
pojaala) and resistor network as shown below.
The circuit meets our definition of diferencijsko pojaala
The output is proportional to the difference between the input signals

R1

R2

Ri1

Ro

V1

Ri2
+

R3

Vo

R4

V2

13

DA CMRR
This assumes that the operacijska pojaala is ideal and that the resistors are
balanced.
Keeping the assumption that the operacijska pojaala is ideal, lets see what
happens when an imbalance factor () is introduced.

Vdm/2

R1

R2(1-)

Vcm
+
Vdm/2

R1

Vo

R2

14

DA CMRR
After some algebra we find that [1]

Vo AdmVdm AcmVcm
where
R2
R1 2 R2
1
Adm

R1
R1 R2 2
R2
Acm

R1 R2
As expected, an imbalance affects the diferencijsko and zajedniki pojaanjas, which will
affect CMRR!
As the error->0, Adm->R2/R1 and Acm->0.
15

DA CMRR
Since we have equations za Acm and Adm, lets look at CMR

Adm

CMR(dB ) 20 log10
Acm

R2

2
R

1
2

1

R1 R2 2
R1
20 log10
R2

R1 R2

If the imbalance is sufficiently small we can neglect its effect on Adm


With that and some algebra we find [1]

R2
R1

CMR(dB) 20 log10

16

DA CMRR
This equation shows two very important relationships

R2
R1

CMR (dB) 20 log10

As the pojaanja of difference pojaala increases (R2/R1), CMR increases


As the mismatch () increases, CMR decreases

Please remember that this just shows the effects of the resistor network and
assumes an ideal pojaala

17

DA CMRR
Another possible source za CMRR degradation is the impedance at the
reference pin.
So far we have connected this pin to low-impedance ground.
+

Vdm/2

R1

R2
+

Vcm
+
Vdm/2

R1

Vo

R2

Placing and impedance here will disturb the napon divider we come across
during superposition analysis.
This will negatively affect CMR
18

Real DA CMRR Example (INA149 PDS)

19

Why not make our own DA?


If DA is simply an operacijska pojaala and 4 resistors, I can save money by
making my own, right?
T -319.09

R2 25k

0%

0%
Gain (dB)

R1 25k

-319.09

R3 25k

R4 25k

0%

0%

Vout

Vcm

-319.09
10.00

1.00k
Frequency (Hz)

100.00k

Should be well-matched
Should have low temperature drift

20

Why not make our own DA?


Lets assume an ideal pojaala and
just look at resistor mismatches
using TINA (only changing R2)

R1 25k

R2 25k

0%

Monte Carlo analysis

Gaussian distribution (6), 100


cases

-60.00

Values are negative due to TINA


T

0.1%

R3 25k

R4 25k

0%

0%

Vout

Vcm

Gain (dB)

-80.00

-100.00

-120.00

-140.00
10.00

1.00k
Frequency (Hz)

100.00k

Assuming 0% tolerance za R1, R3,


and R4 and only 0.1% tolerance za
R2 this network can degrade CMRR
to 66dB (calculated), 69.16dB
(simulated).

21

Why not make our own DA?


What if all resistors are 0.01% or 0.1%?
R2 25k

0.01%

0.01%

Worse perzamance
than all of our DAs

R1 150k

R2 150k

0.1%

0.1%
+

R3 25k

R4 25k

0.01%

0.01%

Vout

R3 150k
+

R1 25k

0.1%

R4 150k

Vout

0.1%

Vcm

-81.93

-60.84

Gain (dB)

-100.84

Gain (dB)

Vcm

-93.35

-125.86

-119.74
10.00

1.00k
Frequency (Hz)

100.00k

10.00

1.00k
Frequency (Hz)

100.00k

22

Why not make our own DA?


0.5%: 52dB (calc), 53.64dB (sim)
T

1.0%: 46dB (calc), 46.85dB (sim)

-40.00

-40.00

-60.00
Gain (dB)

-80.00

-80.00
-100.00

-120.00

-100.00
10.00

1.00k
Frequency (Hz)

100.00k

10.00

1.00k
Frequency (Hz)

100.00k

5.0%: 32dB (calc), 33.34dB (sim)


T

-20.00

-40.00
Gain (dB)

Gain (dB)

-60.00

-60.00

-80.00

-100.00
10.00

1.00k
Frequency (Hz)

100.00k

23

Why not make our own DA?


80dB: Lowest cost of one 0.01%, 10ppm/C resistor (1k pricing)

1206 package:
0805 package:
0603 package:
0402 package:

$0.45 ($1.80 total cost)


$0.53 ($2.12 total cost)
$0.53 ($2.12 total cost)
$0.50 ($2.00 total cost, 10k pricing!)

60dB: Lowest cost 4-pack 0.1%, 25ppm/C resistor (1k pricing)


SO-8 package: $0.98 ($0.98 total cost)

Footprint size comparison:


1 required
(need op amp)

4 required

24

Why not make our own DA?


Now that we understand how the resistor matching can affect CMRR and
the related cost, what about an integrated solution?
TI can trim resistors to within 0.01% relative accuracy
INA152

CMR(min)=80dB
GE=10ppm/C (max)
On-chip resistors will drift together
MSOP-8
1k price on www.ti.com: $1.20
Includes pojaala!

Some DAs can give CMR(min)=74dB @ $1.05!


Customer will require 2 suppliers (1 za OA, 1 za precision resistors)

Op amp included!

25

DA pojaanja
We learned that the pojaanja of difference pojaala is set by R2 and R1.
What if we wanted variable pojaanja?
We would have to adjust 2 resistors due to the topology.
To retain good CMR they would have to be tightly matched, too.
This is difficult and expensive

Alternately, you could use an external operacijska pojaala (with very low
output impedance so as not to degrade CMR) to drive the reference pin as
shown below [4]

R2 RG
v2 v1
vo
R1 R3
26

DA pojaanja
But, R3 should be precision resistor. Its error will be seen as pojaanja error.
You also need to purchase an external operacijska pojaala and potentiometer.
If you need variable pojaanja, there are better options
instrumentacijska pojaala (IAs) usually have an external resistor that can be used to
set the pojaanja
Programmable pojaanja pojaala (PGAs) can be programmed (either with pin
settings or digitally) with particular pojaanja

In summary, difference pojaala are typically manufactured with set pojaanja


so as to preserve CMR and since there are alternate (better) solutions za
variable pojaanja
Since difference pojaala come with fixed pojaanja, you will only see 1 CMR
curve in the datasheet

27

Difference pojaala-Summary
Pros:

Difference pojaala amplify diferencijsko signals and reject zajedniki signals


The zajedniki rejection is based mainly resistor matching
Making your own difference pojaala will not yield the same perzamance
Difference pojaala can be used to protect apojaanjast ground disturbances

Cons:
Externally changing the pojaanja of difference pojaala is not worthwhile
The input impedance is finite
This means that difference pojaala will load the input signals
If the input signal sources impedances are not balanced, CMR could be degraded

Is there way we can amplify diferencijsko signals, change the pojaanja, retain
high CMR, and not load our source?
Yes! Buffer the inputsthis creates an instrumentacijska pojaala (IA).

28

instrumentacijska pojaala
There are 2 common types of
instrumentacijska pojaala
2 op-amp (e.g. INA122)
3 op-amp (e.g. INA333)

29

instrumentacijska pojaala
Notice both have pojaanja equations so you can vary the pojaanja
Notice the input impedance is that of the non-inverting terminal of noninverting pojaala
High-Z Nodes

Difference Amp

High-Z Nodes

Variable
pojaanja

30

IA CMRR
So, what is the CMRR of an instrumentacijska pojaala?
instrumentacijska pojaala reject zajedniki signals (Acm->0)
Recall

Adm
CMRR
Acm

CMRR is directly related to diferencijsko pojaanja. Since we can change the


diferencijsko pojaanja of an IA, we also change the CMRR.

31

INA826 CMRR Model Verification

V1 15

Rg

Rg 1k

Ref

Rg
+
+

U1 INA826

+
-

160

Vout

G1000
140
G100

Vcm

120

G10

G1

+V 15

Gain (dB)

100

80

60

40

20

0
10

215

5k

100k

Frequency (Hz)

32

INA826-Effects of Rg Tolerance on CMRR


Now that we see our INA826 model is accurate, lets look at the effects
of Rgs tolerance on CMRR
Set G=100, 6 resistors, 100 cases.
Note that due to the number of cases, no post-processing was perzamed
Normally this would be pojaanja/Wavezam. Therezae we have to mentally
subtract 20dB from this cluster of wavezams.
T -74.19

T -74.19

1% Resistor

-81.16

Gain (dB)

-87.97dB<CMR<-88.13dB
Adjusted for gain:
-107.97dB<CMR<-108.13dB

T -74.19

-88.13
10.00

1.00k
Frequency (Hz)

-88.04dB<CMR<-88.07dB
Adjusted for gain:
-108.04dB<CMR<-108.07dB

-81.13

-88.08
10.00

100.00k

1.00k
Frequency (Hz)

100.00k

0.1% Resistor
Gain (dB)

Gain (dB)

5% Resistor

-88.065531dB<CMR<-88.06869dB
Adjusted for gain:
-108.065531dB<CMR<-108.06869dB

-81.13

-88.07
10.00

1.00k
Frequency (Hz)

100.00k

Notice the pojaanja


setting resistor tolerance
does not significantly
affect the CMR.

33

2-OA instrumentacijska pojaala


What are the properties of 2-OA
instrumentacijska pojaala?
Pros
Lower cost (only 2 op-amps), less trimming
High impedance input
Can be placed in smaller package

Cons
Compare signal path to Vo za Vin+ and Vin Vin+ has shorter path than V This delay does not allow the zajedniki
components to cancel each other as well as
frequency increases
Therezae CMR degradation occurs earlier in
frequency than the 3-OA designs
Since we can change the
diferencijsko pojaanja, the
CMR also changes.

34

Real IA CMR Competitive Analysis

35

Summary
A diferencijsko pojaala amplifies diferencijsko signals, not zajedniki
signals
Examples include operacijska pojaala, difference pojaala, and
instrumentacijska pojaala

CMRR is defined as the ratio of diferencijsko pojaanja to zajedniki


pojaanja
All diferencijsko pojaala have an ideal zajedniki pojaanja of 0
To determine if circuits CMRR is going to change with pojaanja, you
must look at the diferencijsko pojaanja. Remember an op-amps
diferencijsko pojaanja is fixed.
If you can change the diferencijsko pojaanja of the device/circuit, the
CMRR will also change
36

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