Microcontroller 8051

Topics to be covered
CPU operation
Memory space
Software overview
Peripheral overview
Interrupt
Timers
Parallel port inputs and
outputs
Serial port
low power special modes

of operation Noise
8051
Suresh.P.Nair , HOD - ECE , RCET
Main References
8051
Introduction
to
Microcontroll
ers
8051
Why do we need to learn

Microprocessors/controllers
?
The microprocessor is the core of computer systems.
Nowadays
many
communication,
digital
entertainment, portable devices, are controlled by
them.
A designer should know what types of components
he needs, ways to reduce production costs and
product reliable.
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The necessary tools for a

microprocessor/controller
1.
2.
3.
4.
5.
6.
7.
8.
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CPU: Central Processing Unit

I/O: Input /Output
Bus: Address bus & Data bus
Memory: RAM & ROM
Timer
Interrupt
Serial Port
Parallel Port
Microprocessors
CPU for Computers
No RAM, ROM, I/O on CPU chip itself
Example: Intel's x86, Motorolas 680x0
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Microcontroller
A smaller computer
On-chip RAM, ROM, I/O ports...
Example: Motorolas 6811, Intels 8051, Zilogs
Z8 and PIC
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Microprocessor vs.
Microcontroller
Microprocessor
Microcontroller
CPU is stand-alone, RAM,

ROM, I/O, timer are
separate
CPU, RAM, ROM, I/O and

timer are all on a single
chip
Designer can decide on

the amount of ROM, RAM
and I/O ports.
Fix amount of on-chip

ROM, RAM, I/O ports
Expansive
Versatility
General-purpose
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For applications in which

cost, power and space are
critical
Not Expansive
Single-purpose
Microcontrollers for Embedded

Systems
Home
Appliances, intercom, telephones, security systems, garage

door openers, answering machines, fax machines, home
computers, TVs, cable TV tuner, VCR, camcorder, remote
controls, video games, cellular phones, musical instruments,
sewing machines, lighting control, paging, camera, pinball
machines, toys, exercise equipment etc.
Office
Telephones, computers, security systems, fax machines,

microwave, copier, laser printer, color printer, paging etc.
Auto
Trip computer, engine control, air bag, ABS, instrumentation,
security system, transmission control, entertainment, climate
control, cellular phone, keyless entry
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10
Choosing a Microcontroller
8-bit microcontrollers
Motorolas 6811
Intels 8051
Zilogs Z8
Microchips PIC
There are also 16-bit and 32-bit

microcontrollers made by various chip
makers
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Criteria for Choosing a

Microcontroller
Meeting the computing needs of the task at
hand efficiently and cost effectively
Speed
Packaging
Power consumption
The amount of RAM and ROM on chip
The number of I/O pins and the timer on chip
How easy to upgrade to higher performance or
lower power-consumption versions
Cost per unit
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Criteria for Choosing a

Microcontroller
Availability of software development tools, such
as compilers, assemblers, and debuggers
Wide availability and reliable sources of the
microcontroller
The 8051 family has the largest
diversified (multiple source) suppliers
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number
of
Intel (original)
Atmel
Philips/Signetics
AMD
Infineon (formerly Siemens)
Matra
Dallas Semiconductor/Maxim
13
8051 CPU Operation

1.Features
2.Pin Diagram
3.Block Diagram
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14
8051 Microcontroller
Intel introduced 8051, referred as MCS51, in 1981.
The 8051 is an 8-bit processor
The CPU can work on only 8 bits of data at a

time
The 8051 became widely popular after

allowing other manufactures to make
and market any flavor of the 8051.
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8051 Family
The 8051 is a subset of the 8052
The 8031 is a ROM-less 8051
Add external ROM to it
You lose two ports, and leave only 2 ports for I/O operations
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8051 Features
64KB Program Memory address space

64KB Data Memory address space
4K bytes of on-chip Program Memory
128 bytes of on-chip Data RAM
32 bidirectional and individually addressable 1/0
lines
Two 16-bit timer/counters
Full duplex UART
6-source/5-vector interrupt structure with two
priority levels
On-chip clock oscillator
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Pin Description of the 8051

8051 family members (e.g., 8751, 89C51,
89C52, DS89C4x0)
Have 40 pins dedicated for various functions such
as I/O, RD, WR, address, data, and interrupts.
Come in different packages, such as
DIP(dual in-line package),
QFP(quad flat package), and
LLC(leadless chip carrier)
Some companies provide a 20-pin version of

the 8051 with a reduced number of I/O ports
for less demanding applications
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Pin Diagram of the 8051
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XTAL1 and XTAL2

The 8051 has an on-chip oscillator but
requires an external clock to run it
A quartz crystal oscillator is connected to inputs
XTAL1 (pin19) and XTAL2 (pin18)
The quartz crystal oscillator also needs two
capacitors of 30 pF value
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XTAL1 and XTAL2 ..

If you use a frequency source other than a
crystal oscillator, such as a TTL oscillator:
It will be connected to XTAL1
XTAL2 is left unconnected
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XTAL1 and XTAL2 ..

The speed of 8051 refers to the maximum
oscillator frequency connected to XTAL.
We can observe the frequency on the XTAL2
pin using the oscilloscope.
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RST
RESET pin is an input and is active high (normally low)
Upon applying a high pulse to this pin, the
microcontroller will reset and terminate all activities
This is often referred to as a power-on reset
Activating a power-on reset will cause all values in the
registers to be lost
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RST
In order for the RESET input to be effective, it must
have a minimum duration of 2 machine cycles.
In other words, the high pulse must be high for a
minimum of 2 machine cycles before it is allowed
to go low.
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EA
EA, external access, is an input pin
and must be connected to Vcc or GND
The 8051 family members all come with
on-chip ROM to store programs and also
have an external code and data
memory.
Normally EA pin is connected to Vcc
EA pin must be connected to GND to
indicate that the code or data is stored
externally.
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PSEN and ALE

PSEN, program store enable, is
an output pin
This pin is connected to the OE pin of
the external memory.
For External Code Memory, PSEN = 0
For External Data Memory, PSEN = 1
ALE pin is used for demultiplexing the
address and data.
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I/O Port Pins

The four 8-bit I/O ports P0,
P1, P2 and P3 each uses 8
pins.
All the ports upon RESET are
configured as output, ready
to be used as input ports by
the external device.
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Port 0
Port 0 is also designated as AD0-AD7.
When connecting an 8051 to an
external memory, port 0 provides both
address and data.
The 8051 multiplexes address and data
through port 0 to save pins.
ALE indicates if P0 has address or

data.
When ALE=0, it provides data D0-D7
When ALE=1, it has address A0-A7
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Port 1 and Port 2

In 8051-based systems with no
external memory connection:
Both P1 and P2 are used as simple I/O.
In
8051-based
systems
with
external memory connections:
Port 2 must be used along with P0 to
provide the 16-bit address for the
external memory.
P0 provides the lower 8 bits via A0 A7.
P2 is used for the upper 8 bits of the 16bit address, designated as A8 A15,
and it cannot be used for I/O.
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Port 3
Port 3 can be used as input or
output.
Port 3 has the additional
function of providing some
extremely important signals
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Pin Description Summary

PIN
TYP
E
NAME AND FUNCTION
Vss
Ground: 0 V reference.
Vcc
Power Supply: This is the power supply

voltage for normal, idle, and power-down
operation.
P0.0
- I/O
P0.7
Port 0: Port 0 is an open-drain, bi-directional

I/O port. Port 0 is also the multiplexed loworder address and data bus during accesses
to external program and data memory.
P1.0
- I/O
P1.7
Port 1: Port I is an 8-bit bi-directional I/O port.
P2.0
- I/O
P2.7
Port 2: Port 2 is an 8-bit bidirectional I/O. Port 2

emits the high order address byte during
fetches from external program memory and
during accesses to external data memory
that use 16 bit addresses.
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Pin Description Summary

PIN
TY
P
E
NAME AND FUNCTION
RST
Reset: A high on this pin for two machine cycles

while the oscillator is running, resets the
device.
ALE
Address Latch Enable: Output pulse for

latching the low byte of the address during an
access to external memory.
PSEN*
Program Store Enable: The read strobe to

external program memory. When executing
code from the external program memory,
PSEN* is activated twice each machine cycle,
except that two PSEN* activations are skipped
during each access to external data memory.
EA*/VP
P
External
Access
Enable/Programming
Supply Voltage: EA* must be externally held
low
to enable
the
device
Suresh.P.Nair
, HOD
- ECE
, RCET to fetch code from 32
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General Block Diagram

of 8051
Interrupt
Control
4K
ROM
128 B
RAM
CPU
OSC
Bus
Control
Serial
Port
4 I/O Ports
P0
P1
P2
P3
TXD RXD
Detailed Block Diagram
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Memory
Space
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64K
External
External
8051 Memory Structure
60K
64K
SFR
EXT
EA = 0
INT
4K
128
EA = 1
Program Memory
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Data Memory
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Internal RAM Structure

Direct
Addressing
Only
Direct &
Indirect
Addressing
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SFR [ Special
Function Registers]
128 Byte Internal
RAM
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Special Function Registers

[SFR]
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Program Status Word [PSW]
AC F0
RS1
RS0 OV
Carry
Parity
Auxiliary Carry
User Flag 0
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F1
User Flag 1
Register Bank Select
Overflow
39
8051 instructions that affects

flag
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128 Byte RAM

There are 128 bytes of RAM in the
8051.
Assigned addresses 00 to 7FH
General Purpose
Area
The 128 bytes are divided into 3

different groups as follows:
BIT Addressable
1. A total of 32 bytes from locations 00 to 1F

Area
128 BYTE
hex are set aside for register banks and
INTERNAL RAM
the stack.
Reg Bank 3
2. A total of 16 bytes from locations 20H to
2FH are set aside for bit-addressable Reg Bank 2
Register Banks
read/write memory.
Reg Bank 1
3. A total of 80 bytes from locations 30H to
7FH are used for read and write storage, Reg Bank 0
called scratch pad.
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8051 RAM with addresses
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8051 Register Bank

Structure
Bank
3
Bank
2
Bank
1
Bank
0
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R0 R1 R2 R3 R4 R5 R6 R7
R0 R1 R2 R3 R4 R5 R6 R7
R0 R1 R2 R3 R4 R5 R6 R7
R0 R1 R2 R3 R4 R5 R6 R7
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8051 Register Banks with

address
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8051 Programming Model
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8051 Stack
The stack is a section of RAM used by the CPU
to store information temporarily.
This information could be data or an address
The register used to access the stack is called

the SP (stack pointer) register
The stack pointer in the 8051 is only 8 bit wide,
which means that it can take value of 00 to FFH
When the 8051 is powered up, the SP register
contains value 07
RAM location 08 is the first location begin used for
the stack by the 8051
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8051 Stack
The storing of a CPU register in the stack is
called a PUSH
SP is pointing to the last used location of the stack
As we push data onto the stack, the SP is
incremented by one
This is different from many microprocessors
Loading the contents of the stack back into a

CPU register is called a POP
With every pop, the top byte of the stack is copied
to the register specified by the instruction and the
stack pointer is decremented once
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Bit Addressable & Byte

Addressable
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Single bit Instructions
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Bit Addressable Programming

Example: Find out to which by each of the following
bits belongs. Give the address of the RAM byte in hex
(a) SETB 42H, (b) CLR 67H, (c) CLR 0FH (d) SETB 28H, (e) CLR 12,
(f) SETB 05
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8051 Peripheral
Overview
1.Timers
2.Serial Port
3.Interrupts
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TIMERS
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8051 Timer/Counter
OSC
12
C /T 0
C /T 1
TLx THx
TFx
(8 Bit)
(8 Bit) (1 Bit)
T PIN
INTERRUPT
TR
Gate
INT PIN
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TMOD Register
GATE:
When set, timer/counter x is enabled, if INTx pin is high
and TRx is set.
When cleared, timer/counter x is enabled, if TRx bit set.
C/T*:
When set, counter operation (input from Tx input pin).
When cleared, timer operation (input from internal clock).
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TMOD Register
The TMOD byte is not bit addressable.
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TCON Register
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8051
Timer
Modes
8051 TIMERS
Timer 0
Timer 1
Mode 0
Mode 0
Mode 1
Mode 1
Mode 2
Mode 2
Mode 3
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TIMER 0
OSC
12
C /T 0
C /T 1
TL0 TH0
TF0
T 0 PIN
TR 0
Gate
INT 0 PIN
INTERRU
PT
TIMER 0 Mode 0
13 Bit Timer /
Counter
OSC
12
C /T 0
C /T 1
T 0 PIN
TL0
TH0
(5 Bit) (8 Bit)
TF0
TR 0
Gate
INT 0 PIN
Maximum Count = 1FFFh

(0001111111111111)
INTERRUP
T
TIMER 0 Mode 1
16 Bit Timer /
Counter
OSC
12
C /T 0
C /T 1
T 0 PIN
TL0
TH0
(8 Bit) (8 Bit)
TF0
TR 0
Gate
INT 0 PIN
Maximum Count = FFFFh

(1111111111111111)
INTERRUP
T
TIMER 0 Mode 2
8 Bit Timer / Counter with
AUTORELOAD
OSC
12
C /T 0
C /T 1
T 0 PIN
TL0
TH0
(8 Bit) (8 Bit)
TF0
TR 0
Gate
Reloa
d
INT 0 PIN
TH0
(8 Bit)
Maximum Count = FFh

(11111111)
INTERRUP
T
TIMER 0 Mode 3
Two - 8 Bit Timer /
Counter
OSC
12
C /T 0
C /T 1
T 0 PIN
TL0
(8 Bit)
TF0
INTERRUP
T
TH0
(8 Bit)
TF1
INTERRUP
T
TR 0
Gate
INT 0 PIN
OSC
TR1
12
TIMER 1
OSC
12
C /T 0
C /T 1
TL1 TH1
TF1
T 1PIN
TR1
Gate
INT 1 PIN
INTERR
UPT
TIMER 1 Mode 0
13 Bit Timer /
Counter
OSC
12
C /T 0
C /T 1
T 1PIN
TL1
TH1
(5 Bit) (8 Bit)
TF1
TR1
Gate
INT 1 PIN
Maximum Count = 1FFFh

(0001111111111111)
INTERRUP
T
TIMER 1 Mode 1
16 Bit Timer /
Counter
OSC
12
C /T 0
C /T 1
T 1PIN
TL1
TH1
(8 Bit) (8 Bit)
TF1
TR1
Gate
INT 1 PIN
Maximum Count = FFFFh

(1111111111111111)
INTERRUP
T
TIMER 1 Mode 2
8 Bit Timer / Counter with
AUTORELOAD
OSC
12
C /T 0
C /T 1
T 1PIN
TL1
TH1
(8 Bit) (8 Bit)
TF1
TR1
Gate
Reloa
d
INT 1 PIN
TH1
(8 Bit)
Maximum Count = FFh

(11111111)
INTERRUP
T
Programming Timers
Example: Indicate which mode and which timer
are selected for each of the following.
(a) MOV TMOD, #01H (b) MOV TMOD, #20H
(c) MOV TMOD, #12H
Solution: We convert the value from hex to binary.
(a) TMOD =
(b) TMOD =
(c) TMOD =
1 of timer
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00000001, mode 1 of timer 0 is selected.

00100000, mode 2 of timer 1 is selected.
00010010, mode 2 of timer 0, and mode
1
are selected.
67
Programming Timers
Find the timers clock frequency and its period for
various 8051-based system, with the crystal
frequency 11.0592 MHz when C/T bit of TMOD is 0.
Solution:
1/12 11.0529 MHz = 921.6

MHz;
T = 1/921.6 kHz = 1.085 us
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8051
Serial
Port
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Basics of Serial
Communication
Computers transfer data in two ways:
Parallel: Often 8 or more lines (wire conductors) are used
to transfer data to a device that is only a few feet away.
Serial: To transfer to a device located many meters away,
the serial method is used. The data is sent one bit at a
time.
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Basics of Serial
Communication
Serial data communication uses two methods
Synchronous method transfers a block of data at a
time
Asynchronous method transfers a single byte at a time
There are special ICs made by many

manufacturers for serial communications.
UART (universal asynchronous Receiver transmitter)
USART (universal synchronous-asynchronous Receivertransmitter)
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Asynchronous Start & Stop

Bit
Asynchronous serial data communication is widely
used for character-oriented transmissions
Each character is placed in between start and stop
bits, this is called framing.
Block-oriented data transfers use the synchronous
method.
The start bit is always one bit, but the stop

bit can be one or two bits
The start bit is always a 0 (low) and the stop
bit(s) is 1 (high)
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Asynchronous Start & Stop

Bit
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Data Transfer Rate

The rate of data transfer in serial data
communication is stated in bps (bits per second).
Another widely used terminology for bps is baud
rate.
It is modem terminology and is defined as the number
of signal changes per second
In modems, there are occasions when a single change of
signal transfers several bits of data
As far as the conductor wire is concerned, the

baud rate and bps are the same.
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8051 Serial Port
Synchronous and Asynchronous

SCON Register is used to Control
Data Transfer through TXd & RXd pins
Some time - Clock through TXd Pin
Four Modes of Operation:
Mode
Mode
Mode
Mode
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0
1
2
3
:Synchronous Serial Communica

:8-Bit UART with Timer Data Rat
:9-Bit UART with Set Data Rate
:9-Bit UART with Timer Data Rat
75
Registers related to Serial

Communication
1.SBUF Register
2.SCON Register
3.PCON Register
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SBUF Register
SBUF is an 8-bit
communication.
register
used
solely
for
serial
For a byte data to be transferred via the TxD line, it must

be placed in the SBUF register.
The moment a byte is written into SBUF, it is framed with
the start and stop bits and transferred serially via the TxD
line.
SBUF holds the byte of data when it is received by 8051
RxD line.
When the bits are received serially via RxD, the 8051
deframes it by eliminating the stop and start bits, making
a byte out of the data received, and then placing it in SBUF.
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SBUF Register
Sample Program:
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78
SCON Register
SM0 SM1 SM2 REN TB8 RB8
Set to Enable
Serial Data
reception
Enable Multiprocessor
Communication Mode
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9th Data Bit

Sent in Mode 2,3
TI
RI
Set when a Charactor received

Set when Stop bit Txed
9th Data Bit
Received in Mode 2,3
79
8051 Serial Port Mode 0

The Serial Port in Mode-0 has the following
features:
1. Serial data enters and exits through RXD
2. TXD outputs the clock
3. 8 bits are transmitted / received
4. The baud rate is fixed at (1/12) of the oscillator
frequency
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features:
1. Serial data enters through RXD
2. Serial data exits through TXD
3. On receive, the stop bit goes into RB8 in SCON
1. Start bit (0)
2. Data bits (8)
3. Stop Bit (1)
5. Baud rate is determined by the Timer 1 over flow rate.

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features:
3. 9th data bit (TB8) can be assign value 0 or 1
4. On receive, the 9th data bit goes into RB8 in SCON
1.Start bit (0)
2.Data bits (9)
3.Stop Bit (1)
6. Baud rate is programmable
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features:
3. 9th data bit (TB8) can be assign value 0 or 1
4. On receive, the 9th data bit goes into RB8 in SCON
1.Start bit (0)
2.Data bits (9)
3.Stop Bit (1)
6. Baud rate is determined by Timer 1 overflow rate.
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Programming Serial Data

Transmission
1. TMOD register is loaded with the value 20H, indicating the
use of timer 1 in mode 2 (8-bit auto-reload) to set baud rate.
2. The TH1 is loaded with one of the values to set baud rate for
serial data transfer.
3. The SCON register is loaded with the value 50H, indicating
serial mode 1, where an 8- bit data is framed with start and stop
bits.
4. TR1 is set to 1 to start timer 1
5. TI is cleared by CLR TI instruction
6. The character byte to be transferred serially is written into
SBUF register.
7. The TI flag bit is monitored with the use of instruction JNB TI,
xx to see if the character has been transferred completely.
8. To transfer the next byte, go to step 5
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Programming Serial Data

Reception
1. TMOD register is loaded with the value 20H, indicating the
use of timer 1 in mode 2 (8-bit auto-reload) to set baud rate.
2. TH1 is loaded to set baud rate
3. The SCON register is loaded with the value 50H, indicating
serial mode 1, where an 8- bit data is framed with start and
stop bits.
4. TR1 is set to 1 to start timer 1
5. RI is cleared by CLR RI instruction
6. The RI flag bit is monitored with the use of instruction JNB RI,
xx to see if an entire character has been received yet
7. When RI is raised, SBUF has the byte, its contents are
moved into a safe place.
8. To receive the next character, go to step 5.
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Doubling Baud Rate

There are two ways to increase the baud rate
of data transfer
1. By using a higher frequency crystal
2. By changing a bit in the PCON register
PCON register is an 8-bit register.
When 8051 is powered up, SMOD is zero

We can set it to high by software and thereby double the baud rate.
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Doubling Baud Rate (cont)
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Interrup
ts
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88
INTERRUPTS
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Interrupt Vs Polling
1. Interrupts
Whenever any device needs its service, the device notifies
the microcontroller by sending it an interrupt signal.
Upon receiving an interrupt signal, the microcontroller
interrupts whatever it is doing and serves the device.
The program which is associated with the interrupt is called
the interrupt service routine (ISR) or interrupt handler.
2. Polling
The microcontroller continuously monitors the status of
a given device.
When the conditions met, it performs the service.
After that, it moves on to monitor the next device until
every one is serviced.
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Interrupt Vs Polling
The polling method is not efficient, since it wastes
much of the microcontrollers time by polling devices that
do not need service.
The advantage of interrupts is that the microcontroller
can serve many devices (not all at the same time).
Each devices can get the attention of the microcontroller
based on the assigned priority.
For the polling method, it is not possible to assign
priority since it checks all devices in a round-robin fashion.
The microcontroller can also ignore (mask) a device
request for service in Interrupt.
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Steps in Executing an
Interrupt
finishes the instruction it is executing and saves
1. It
address of the next instruction (PC) on the stack.
the
2. It also saves the current status of all the interrupts

internally (i.e: not on the stack).
3. It jumps to a fixed location in memory, called the
interrupt vector table, that holds the address of the ISR.
4. The microcontroller gets the address of the ISR from the
interrupt vector table and jumps to it.
5. It starts to execute the interrupt service subroutine
until it reaches the last instruction of the subroutine which
is RETI (return from interrupt).
6. Upon executing the RETI instruction, the microcontroller
returns to the place where it was interrupted.
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Six Interrupts in 8051

Six interrupts are allocated as follows:
1.Reset power-up reset.
2.Two interrupts are set aside for the timers.
one for timer 0 and one for timer 1
3.Two interrupts are set aside for hardware

external interrupts.
P3.2 and P3.3 are for the external hardware interrupts

INT0 (or EX1), and INT1 (or EX2)
4.Serial communication has a single interrupt

that belongs to both receive and transfer.
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What events can trigger

Interrupts?
We can configure the 8051 so that any of the
following events will cause an interrupt:
Timer 0 Overflow.
Timer 1 Overflow.
Reception/Transmission of Serial Character.
External Event 0.
External Event 1.
We can configure the 8051 so that when Timer 0

Overflows or when a character is sent/received,
the appropriate interrupt handler routines are
called.
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8051 Interrupt Vectors
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95
8051 Interrupt related

Registers
The various registers associated with the
use of interrupts are:
TCON - Edge and Type bits for External
Interrupts 0/1
SCON - RI and TI interrupt flags for RS232
IE - Enable interrupt sources
IP - Specify priority of interrupts
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Enabling and Disabling an

Interrupt
Upon reset, all interrupts are disabled
(masked), meaning that none will be responded
to by the microcontroller if they are activated.
The interrupts must be enabled by software in
order for the microcontroller to respond to them.
There is a register called IE (interrupt enable)
that is responsible for enabling (unmasking) and
disabling (masking) the interrupts.
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Interrupt Enable (IE) Register

--
EA
MOV IE,#08h
or
SETB ET1
: Global enable/disable.
--- : Reserved for additional

interrupt hardware.
ES
: Enable Serial port interrupt.
ET1 : Enable Timer 1 control bit.

EX1 : Enable External 1 interrupt.
ET0 : Enable Timer 0 control bit.
EX0 : Enable External 0 interrupt.
8051
98
Enabling and Disabling an

Interrupt
Example: Show the instructions to (a) enable the serial
interrupt, timer 0 interrupt, and external hardware
interrupt 1 and (b) disable (mask) the timer 0 interrupt,
then (c) show how to disable all the interrupts with a
single instruction.
Solution:
(a) MOV IE,#10010110B ;enable serial, timer 0, EX1
Another way to perform the same manipulation is:
SETB
SETB
SETB
SETB
IE.7
IE.4
IE.1
IE.2
;EA=1, global enable

;enable serial interrupt
;enable Timer 0 interrupt
;enable EX1
(b) CLR IE.1 ;mask (disable) timer 0 interrupt only

(c) CLR IE.7 ;disable all interrupts
8051
99
Interrupt Priority
When the 8051 is powered up, the priorities are assigned
according to the following.
In reality, the priority scheme is nothing but an internal
polling sequence in which the 8051 polls the interrupts in
the sequence listed and responds accordingly.
8051
100
Interrupt Priority
We can alter the sequence of interrupt priority by
assigning a higher priority to any one of the interrupts by
programming a register called IP (interrupt priority).
To give a higher priority to any of the interrupts, we make
the corresponding bit in the IP register high.
8051
101
Interrupt Priority (IP) Register
Reserved
PS
PT1 PX1
PT0
PX0
Serial Port
Timer 1 Pin
INT 1 Pin
Priority bit=1 assigns high
priority
Priority bit=0 assigns low
8051
INT 0 Pin
Timer 0 Pin
102
8051 Software
Overview
1.Addressing Modes
2.Instruction Set
3.Programming
8051
103
8051 Addressing Modes
8051
104
Immediate Addressing Mode

The source operand is a constant.
The immediate data must be preceded by the pound sign,
#
Can load information into any registers, including 16-bit
DPTR register
DPTR can also be accessed as two 8-bit registers, the high byte DPH
and low byte DPL
8051
105
Register Addressing Mode

Use registers to hold the data to be manipulated.
The source and destination registers must

match in size.
MOV DPTR,A will give an error
The movement of data between Rn registers is
not allowed
MOV R4,R7 is
invalid
8051
106
Direct Addressing Mode

It is most often used the direct addressing mode to
access RAM locations 30 7FH.
The entire 128 bytes of RAM can be accessed.
Contrast this with immediate addressing mode,
there is no # sign in the operand.
8051
107
SFR Registers & their

Addresses
MOV 0E0H,#55H
;is the same as
MOV A,#55H
;which means load 55H into A (A=55H)
MOV 0F0H,#25H
;is the same as
MOV
B,#25H ;which means load 25H into B (B=25H)
MOV
MOV
0E0H,R2 ;is the same as

A,R2 ;which means copy R2 into A
MOV 0F0H,R0 ;is the same as

MOV B,R0 ;which means copy R0 into B
Mr. P. Suresh
Intel 8051 Programming
108
SFR Addresses ( 1 of 2 )
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109
SFR Addresses ( 2 of 2 )
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110
Example
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111
Stack and Direct Addressing

Mode
Only direct addressing mode is allowed for pushing or
popping the stack.
PUSH A is invalid.
Pushing the accumulator onto the stack must be coded as
PUSH 0E0H.
8051
112
Register Indirect Addressing

Mode
A register is used as a pointer to the data.
Only register R0 and R1 are used for this purpose.
R2 R7 cannot be used to hold the address of an
operand located in RAM.
When R0 and R1 hold the addresses of RAM
locations, they must be preceded by the @ sign.
8051
113

Mode
Write a program to copy the value 55H into RAM memory locations
40H to 41H using (a) direct addressing mode, (b) register
indirect addressing mode without a loop, and (c) with a loop.
8051
114

Mode
The advantage is that it makes accessing data dynamic

rather than static as in direct addressing mode.
Looping is not possible in direct addressing mode.
Write a program to clear 16 RAM locations starting at
RAM address 60H.
8051
115
External Direct
External Memory is accessed.
There are only two commands that use
External Direct addressing mode:
MOVX A, @DPTR
MOVX @DPTR, A
DPTR must first be loaded with the address of
external memory.
8051
116
8051 Instruction Set
8051
117
MOV Instruction
MOV destination, source ; copy source to
destination.
MOV A,#55H ;load value 55H into reg. A
MOV R0,A
;copy contents of A into R0
;(now A=R0=55H)
MOV R1,A
;(now A=R0=R1=55H)
MOV R2,A
;(now A=R0=R1=R2=55H)
MOV R3,#95H ;load value 95H into R3
;(now R3=95H)
MOV A,R3
;copy contents of R3 into A
;now A=R3=95H
Mr. P. Suresh
118
ADD Instruction
ADD A, source ;ADD the source operand
to the
accumulator
MOV A, #25H
;load 25H into A
MOV R2,#34H
;load 34H into R2
ADD A,R2
;add R2 to accumulator
;(A = A + R2)
Mr. P. Suresh
119
Structure of Assembly
Language
ORG
MOV
MOV
MOV
ADD
0H
R5,#25H
R7,#34H
A,#0
A,R5
ADD A,R7
ADD A,#12H
HERE: SJMP HERE
END
Mr. P. Suresh
;start (origin) at location 0

;load 25H into R5
;load 34H into R7
;load 0 into A
;add contents of R5 to A
;now A = A + R5
;add contents of R7 to A
;now A = A + R7
;add to A value 12H
;now A = A + 12H
;stay in this loop
;end of asm source file
120
Data Types & Directives

ORG 500H
DATA1: DB
28
;DECIMAL (1C
in Hex)
DATA2: DB
00110101B
;BINARY (35 in
Hex)
DATA3: DB
39H
ORG 510H
DATA4: DB
2591
;HEX
; ASCII
NUMBERS
ORG 518H
DATA6: DB
My name is Joe ;ASCII CHARACTERS
Mr. P. Suresh
121
ADD Instruction and PSW
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122
ADD Instruction and PSW
Mr. P. Suresh
123
Multiplication of Unsigned
Numbers
MUL AB
; A B, place 16-bit result in B and A
MOV A,#25H
MOV B,#65H
MUL AB
and A = 99H
;load 25H to reg. A

;load 65H in reg. B
;25H * 65H = E99 where B = 0EH
Table 6-1:Unsigned Multiplication Summary (MUL AB)

Multiplication
Operand 1
Operand 2
Result
byte byte
A=low byte,
B=high byte
Mr. P. Suresh
124
Division of Unsigned Numbers

DIV AB
; divide A by B
MOV A,#95H ;load 95 into A

MOV B,#10H ;load 10 into B
DIV AB ;now A = 09 (quotient) and B = 05 (remainder)
Table 6-2:Unsigned Division Summary (DIV AB)

Division
Numerator
Denominator
Quotient
Remainder
byte / byte
8051
125
Checking an input bit
JNB (jump if no bit) ; JB (jump if bit = 1
8051
126
Switch Register Banks
Mr. P. Suresh
127
Pushing onto Stack
Mr. P. Suresh
128
Popping from Stack
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129
Looping
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130
Loop inside a Loop (Nested

Loop)
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131
8051 Conditional Jump

Instructions
Mr. P. Suresh
132
Conditional Jump Example
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133
Conditional Jump Example
Mr. P. Suresh
134
Unconditional Jump
Instructions
All conditional jumps are short jumps
Target address within -128 to +127 of PC
LJMP (long jump): 3-byte instruction

2-byte target address: 0000 to FFFFH
Original 8051 has only 4KB on-chip ROM
SJMP (short jump): 2-byte instruction

1-byte relative address: -128 to +127
Mr. P. Suresh
135
Call Instructions
LCALL (long call): 3-byte instruction
2-byte address
Target address within 64K-byte range
ACALL (absolute call): 2-byte

instruction
11-bit address
Target address within 2K-byte range
Mr. P. Suresh
136

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low power special modes

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The 8051 became widely popular after

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64KB Program Memory address space

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Some companies provide a 20-pin version of

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Pin Diagram of the 8051

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XTAL1 and XTAL2

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XTAL1 and XTAL2 ..

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XTAL1 and XTAL2 ..

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PSEN and ALE

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I/O Port Pins

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ALE indicates if P0 has address or

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Port 1 and Port 2

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Pin Description Summary