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Functional Units: Input and Arithmetic Logic

The document summarizes the basic functional units of a computer, including the memory unit, arithmetic and logic unit (ALU), control unit, and connections between the processor and memory. It describes how instructions are fetched from memory and executed in the processor, involving fetching operands from registers or memory, performing operations in the ALU, and storing results. It discusses factors that impact computer performance such as hardware design, instruction set, compiler, pipelining, and clock rate.

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150 views20 pages

Functional Units: Input and Arithmetic Logic

The document summarizes the basic functional units of a computer, including the memory unit, arithmetic and logic unit (ALU), control unit, and connections between the processor and memory. It describes how instructions are fetched from memory and executed in the processor, involving fetching operands from registers or memory, performing operations in the ALU, and storing results. It discusses factors that impact computer performance such as hardware design, instruction set, compiler, pipelining, and clock rate.

Uploaded by

bharadwajsngh
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PPT, PDF, TXT or read online on Scribd
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Functional Units

Arithmetic
Input and
logic

Memory

Output Control

I/O Processor

Figure 1.1. Basic functional units of a computer.


Memory Unit
 Storeprograms and data
 Two classes of storage
 Primary storage
 Fast
 Programs must be stored in memory while they are being executed
 Large number of semiconductor storage cells
 Processed in words
 Address
 RAM and memory access time
 Memory hierarchy – cache, main memory
 Secondary storage – larger and cheaper
Arithmetic and Logic Unit
(ALU)
 Most computer operations are executed in
ALU of the processor.
 Load the operands into memory – bring them
to the processor – perform operation in ALU
– store the result back to memory or retain in
the processor.
 Registers

 Fast control of ALU


Control Unit
 All computer operations are controlled by the control
unit.
 The timing signals that govern the I/O transfers are
also generated by the control unit.
 Control unit is usually distributed throughout the
machine instead of standing alone.
 Operations of a computer:
 Accept information in the form of programs and data through an
input unit and store it in the memory
 Fetch the information stored in the memory, under program control,
into an ALU, where the information is processed
 Output the processed information through an output unit
 Control all activities inside the machine through a control unit
Connection Between the
Processor and the Memory
Memory

MAR MDR
Control

PC R0

R1
Processor
IR

Instruction register (IR)


ALU
Rn ­ 1 Program counter (PC)
n general purpose
registers General-purpose register(R0–Rn-1 )
Memory address register (MAR)
Memory data register (MDR)
Figure  1. 2.   Connections between the processor and the  memory.
Operating Steps
 Programs reside in the memory through input
devices
 PC is set to point to the first instruction
 The contents of PC are transferred to MAR
 A Read signal is sent to the memory
 The first instruction is read out and loaded
into MDR
 The contents of MDR are transferred to IR
 Decode and execute the instruction
Operating Steps (Cont’)
 Get operands for ALU
 General-purpose register
 Memory (address to MAR – Read – MDR to ALU)
 Perform operation in ALU
 Store the result back
 To general-purpose register
 To memory (address to MAR, result to MDR – Write)
 During
the execution, PC is
incremented to the next instruction
Bus Structures
 There are many ways to connect different
parts inside a computer together.
 A group of lines that serves as a connecting
path for several devices is called a bus.
 Address/data/control

Input Output Memory Processor

Figure  1. 3.    Single­bus structure.
Speed Issue
 Different devices have different
transfer/operate speed.
 If the speed of bus is bounded by the slowest
device connected to it, the efficiency will be
very low.
 How to solve this?

 A common approach – use buffers.


Performance
 The most important measure of a computer is
how quickly it can execute programs.
 Three factors affect performance:
 Hardware design
 Instruction set
 Compiler
Performance
 Processor time to execute a program depends on the hardware
involved in the execution of individual machine instructions.

Main Cache
memory memory Processor

Bus

Figure 1.5. The processor cache.


Performance
 The processor and a relatively small cache
memory can be fabricated on a single
integrated circuit chip.
 Speed

 Cost

 Memory management
Processor Clock
 Clock, clock cycle, and clock rate
 The execution of each instruction is divided
into several steps, each of which completes
in one clock cycle.
 Hertz – cycles per second
Basic Performance Equation
 T – processor time required to execute a program that has been
prepared in high-level language
 N – number of actual machine language instructions needed to
complete the execution (note: loop)
 S – average number of basic steps needed to execute one
machine instruction. Each step completes in one clock cycle
 R – clock rate
 Note: these are not independent to each other

N×S
T=
R
How to improve T?
Pipeline and Superscalar
Operation
 Instructions are not necessarily executed one after
another.
 The value of S doesn’t have to be the number of
clock cycles to execute one instruction.
 Pipelining – overlapping the execution of successive
instructions.
 Add R1, R2, R3
 Superscalar operation – multiple instruction
pipelines are implemented in the processor.
 Goal – reduce S (could become <1!)
Clock Rate
 Increase clock rate
 Improve the integrated-circuit (IC) technology to make
the circuits faster
 Reduce the amount of processing done in one basic step
(however, this may increase the number of basic steps
needed)
 Increases in R that are entirely caused by
improvements in IC technology affect all
aspects of the processor’s operation equally
except the time to access the main memory.
CISC and RISC
 Tradeoffbetween N and S
 A key consideration is the use of pipelining
 S is close to 1 even though the number of basic steps
per instruction may be considerably larger
 It is much easier to implement efficient pipelining in
processor with simple instruction sets
 Reduced Instruction Set Computers (RISC)
 Complex Instruction Set Computers (CISC)
Compiler
 A compiler translates a high-level language program
into a sequence of machine instructions.
 To reduce N, we need a suitable machine
instruction set and a compiler that makes good use
of it.
 Goal – reduce N×S
 A compiler may not be designed for a specific
processor; however, a high-quality compiler is
usually designed for, and with, a specific processor.
Performance Measurement
 T is difficult to compute.
 Measure computer performance using benchmark programs.
 System Performance Evaluation Corporation (SPEC) selects and
publishes representative application programs for different application
domains, together with test results for many commercially available
computers.
 Compile and run (no simulation)
 Reference computer

Running time on the reference computer


SPEC rating =
Running time on the computer under test
n 1
SPEC rating = (∏SPEC i ) n

i =1
Multiprocessors and
Multicomputers
 Multiprocessor computer
 Execute a number of different application tasks in parallel
 Execute subtasks of a single large task in parallel
 All processors have access to all of the memory – shared-memory
multiprocessor
 Cost – processors, memory units, complex interconnection networks
 Multicomputers
 Each computer only have access to its own memory
 Exchange message via a communication network – message-
passing multicomputers

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