8051 assembly

language
Programming

DEVELOPMENT ENVIRONMENT

Host
The PC used to develop the program, it usually has
Editor (edit source file)
Compiler (convert high level language to machine code *.ob
Assembler (convert assembly language to machine code *.ob
Linker (link several obj files into an absolute obj file)
Obj to Hex converter (convert obj file to Hex file)
Loader (load the hex file to target)
Target
The development hardware with embedded microcontroller.
It can be connected to Host through various interfaces
E.g. RS232, USB, JTAG, IEEE1394,
Host Target board

CONTENTS

PROGRAMMING STEPS
INSRUCTION SET
ADDRESSING MODES
ASSEMBLY PROGRAM EXAMPLES

Steps to Create a
Program

Editor Program
Allows user to type assembly language program with extension .asm
or .a51
Assembler Program
Converts assembly language code into machine language i.e opcodes
are generated for written instructions, that can be understood by
MCU. It will generate two files as follows
1. List file (.lst extension)
Contains list of all addresses & instructions .
2.Object File (.obj extension)
It is binary file contains binary code.
Linker Program
Combine one or more object file into absolute object file no extension.
Object to Hex converter
Converter absolute object file into file with extension Hex which can
be burn into ROM of 8051
Burn the hex file into ROM

Structure of Assembly
Language
ORG 0H
;start (origin) at location 0

MOV R5,#25H
;load 25H into R5
MOV R7,#34H
;load 34H into R7
MOV A,#0
;load 0 into A
ADD A,R5
;add contents of R5 to A
;now A = A + R5
ADD A,R7
;add contents of R7 to A
;now A = A + R7
ADD A,#12H
;add to A value 12H
;now A = A + 12H
HERE: SJMP HERE
;stay in this loop
END
;end of asm source file

Program 2-1:Sample of an Assembly Language Program

ASSEMBLY: STRUCTURE
Structures of assembly language
1. A series of lines of assembly language instructions and/or
directives

2. An assembly language instruction consists of up to 4 fields

[label:] mnemonic [operands] [;comments]

Label: allows the program to refer to a line of code by name
E.g. HERE: SJMP HERE
Mnemonic and operands
The combination of mnemonic and operands will be
translated to binary machine code
E.g. MOV A, #23H ;Opcode: 0111 0100 0010 0011
(7423H)

8051 Program Counter &

ROM Space

Execute a Program Byte by Byte

PC=0000: opcode 7D fetched; 25 fetched;
R525; PC+2

ASSEMBLY: DIRECTIVES
Directives
A pseudo-code that cannot be translated into machine
code
Used to notify assembler of certain operations
E.g. END: notify assembler the end of the source
file.
Commonly used directives
ORG: origin
Indicate the beginning of the address
The number after ORG can be either in hex or
decimal
DB: define byte
Define an 8-bit data

Directive examples
ORG 500H
DATA1: DB
28
Hex)
DATA2: DB
00110101B
DATA3: DB
39H
ORG 510H
DATA4: DB
2591

;DECIMAL (1C in
;BINARY (35 in Hex)
;HEX

; ASCII NUMBERS

ORG 518H
DATA6: DB
My name is Joe ;ASCII
CHARACTERS

 Commonly used directives

EQU: equate
Define a constant without occupying a memory location
It DOES NOT use any memory space!
The constant value can be used later in the program
To improve the readability of the program
Give a name to a constant
To improve code efficiency
If the same constants are used twice in the program,
EQU directive, we only need to change it in one location
value is changed
We should avoid using constant directly, and use the
directive as often as possible.
Example (Demo directives)
COUNT
EQU 25H
MOV R3, #COUNT
MOV A, #COUNT

More examples directives

EQU
Used to create symbols that can be used to represent
registers, numbers, and addresses
LIMIT
EQU 2000
SERIAL
EQU SBUF
SCK
EQU P1.3
MY_VAL
EQU 0x44
DATA
Used to define a name for memory locations
SP
DATA 0x81 ;special function registers
MY_VAL DATA 0x44 ;RAM location
cseg stands for code segment

Instruction Set
8051 instructions have 8-bit opcode
There are 256 possible instructions of
which 255 are implemented
Some instructions have one or two
additional bytes for data or address
There are
139
1-byte
instructions,
92
2-byte instructions, and
24
3-byte
instruction

Instruction Formats
Instruction :- It is specific task that
CPU can perform,it consists of
opcode & zero or more operands.
Opcode :- machine code for specific
operation to be perform to
microcontroller.
e.g ADD,SUB,ANL
Operands :- data or address used by
the instruction.

The 8051 Instruction

Formats
The 8051 instruction formats.

Types of operands
There are three types of operands or three
places from where data is available

1 . direct data/immediate values

Constant integer (8 bits)

Constant value is stored within the instruction

2. registers
Name of a register is specified
Register number is encoded within the instruction

3. memory
Reference to a location in memory
Memory address is encoded within the instruction,
or
Register holds the address of a memory location

Addressing Modes

The addressing mode means where and how the CPU

gets the operands when the instruction is executed

Supported by dedicated hardware components

existing within the CPU as well as by the underlying
Control unit i.e. Completely Architecture Dependent

There are five addressing modes available in the

8051 ,
Immediate
Register
Direct
Register Indirect
Indexed

Addressing mode for non

memory access

Immediate addressing mode

-works on constant data by using
#
Register addressing mode
-woks with registers available in
8051

Immediate Addressing

The source operand is a constant

E.g. MOV A, #25H

MOV R3, #62
MOV DPTR, #4521H ;
MOV DPH, #45H
MOV DPL, #21H ;
The following instructions are illegal
MOV DPTR, #9F235H ; require more than 16-bit
MOV DPTR, #68975 ; FFFFH = 65535

Some special cases of immediate addressing mode

1. Using the EQU directive

COUNT EQU 25H
MOV A, #COUNT ; opcode: 7425H
2. Using address labels
MOV DPTR, #MYDATA ; (DPTR) = 200H
ORG 200H
MYDATA: DB 23H, 35H
#MYDATA is the address of the contents 2335H in ROM
NOTE: MOV DPTR, MYDATA is illegal
3. ASCII code
MOV A, #A ; the ASCII code of A is loaded into register A.

Register Addressing
Use register to hold the data to be
manipulated
Example
MOV A, R0
MOV R2, A
MOV R7, DPL
Notes
MOV R2, R5 is invalid.
MOV A, DPTR is invalid (why?)

Addressing mode for

memory access
There are 3 different addressing
mode to access memory
Direct:
use the address of the memory
Register indirect:
use register to store RAM address
Indexed:
use DPTR register to store ROM
address

Direct Addressing
Direct addressing can access any
on-chip memory location
Example: ADD A,55H
Example: MOV P1, A
Transfers the content of
accumulator to Port 1
(address 90H)

Register Indirect Addressing Mode

R0 or R1 may operate as pointer registers (their content
indicates an address in internal RAM where data are written
or read)
In 8051 assembly language, indirect addressing is
represented by an @ before R0 or R1.
Example: MOV A, @R0
Moves a byte of data from internal RAM at location whose
address is in R0 to the accumulator
Example:
MOV R0, #60H
Loop
:
MOV @R0,#0
INC R0
CJNE R0,#80H,Loop

Relative Addressing
Relative addressing is used with certain jump instructions
Relative address (offset) is an 8-bit signed value (-128 to 127)
which is added to the program counter to form the address of
next instruction
Prior to addition, the program counter is incremented to the
address following the jump (the new address is relative to the
next instruction, not the address of the jump instruction)
This detail is of no concern to the user since the jump
destinations are usually specified as labels and the assembler
determines the relative offset
Advantage of relative addressing: position independent codes
Example here: sjmp here

Absolute Addressing

Absolute addressing is only used

with ACALL and AJMP
The 11 least significant bits of the
destination address comes from
the opcode and the upper five bits
are the current upper five bits in
the program counter(PC).
The destination is in the same 2K
(211) of the source

Long Addressing

Long addressing is used only with the

LCALL and LJMP instructions
These 3-bytes instructions include a full
16-bit
destination address as bytes 2 and 3
The full 64K code space is available
The instruction is long and position
dependent
Example: LJMP, 8AF2H
- Jumps to memory location 8AF2H

Indexed Addressing

Indexed addressing uses a base register

(either the
program counter or data pointer) and an
offset (the
accumulator) in forming the effective
address for a JMPor MOVC instruction
Example: MOVC A, @A+DPTR
This instruction moves a byte of data from
code memory to the accumulator. The address
in code memory is found by adding the
accumulator to the data pointer

Addressing Modes

Types of instructions

Data transfer (moving data between

registers ,internal & external memory)e.g
mov a,r1
Data processing (performing arithmetic
& logical operations on data)e.g add a,r1
Flow control (skipping some part of code
depending upon logic developed, transfer
flow of program to another location)e.g
sjmp,lcall

Data transfer - Internal

Register related
MOV source,destionation
MOV a, byte

;move byte to accumulator

MOV byte, a

;move accumulator to byte

MOV Rn, byte

;move byte to register of
;current bank
MOV direct, byte ;move byte to internal RAM
MOV @Rn, byte
;move byte to internal RAM
address contained in Rn
MOV DPTR, data16 ;move 16-bit data into data
;pointer

;with

Exchange instruction

XCH a, byte
;exchange
accumulator and
;byte
XCHD a, byte;exchange low nibbles of
;accumulator and
Stack related
byte
PUSH byte ;increment
;move byte
POP byte ;move from
;decrement

stack pointer,
on stack
stack to byte,
stack pointer

Data Transfer Instructions External

16-bit addresses uses all Port 2 for high-byte and this port

cannot be used for I/O

MOVX is used for external data transfer
Example:
Read the content of external RAM locations 10F4H and
10F5H and place values in R6 and R7, respectively.
MOV A,#00H
MOV DPTR,#10F4H
MOVX, A,@DPTR
MOV R6,A
INC DPTR
MOVX A,@DPTR
MOV R7,A

MOVC loads the accumulator with a byte from code

(program)
memory (Reading Data from Memory)

The address of the byte fetched is the sum of the original

unsigned 8-bit accumulator contents and the content of a
16-bit register (either the data pointer or PC). In the latter
case, the PC is incremented to the address of the following
instruction before being added to the accumulator
MOVC A, @A+DPTR
MOVC A,@A+PC

This instruction is useful in reading data from LUTs.

DPTR or PC is initialized to the beginning of the LUT and
the index number of the desired entry is loaded into the
accumulator.

Data processing

Arithmetic
Logical
Boolean

Arithmetic Instructions

Example:
ADD A,7FH
ADD A,@R0
ADD A,R7
ADD A,#35H
All arithmetic instructions are
executed in one machine cycle except
INC DPTR (two cycles) and MUL AB
andDIV AB (four cycles)

Logical Instructions
8051 logical instructions perform Boolean
operations on
bytes of data on a bit-by-bit basis .
Example: lets assume A=00110101B.
Instruction ANL A,#01010011B will leave
00010001 in accumulator
Examples logical instructions:
ANL A,55H
ANL A,@R0
ANL A,R6
ANL A,#33H
RL A
SWAP A
RR A

Boolean Instructions
8051 contains a complete Boolean
processor for single-bit operations.
All bit accesses use direct addressing
Bits may be set or cleared in a single
instruction
Example:
SETB P1.7
CLR P1.7
CLR C

Branching Instructions

There are three versions of JMP instruction:

SJMP, LJMP and AJMP.
SJMP instruction specifies destination address as a
relative offset. This instruction is 2 bytes and jump
distance is limited to -128 to 127.

LJMP specifies the destination address as a 16-bit

constant. The destination address can be anywhere in the
64K program memory space

AJMP specifies the destination address as an 11-bit

constant. Destination must be within a 2K block of AJMP.

In all cases, programmer specifies the destination

address to the assembler (using label or a 16-bit
constant) and the
assembler puts destination address into correct format.

Subroutines and Interrupts

There are two versions of the CALL instruction: ACALL and

LCALL using absolute and long addressing. Generic CALL may
be used if the programmer does not care which way the address
is coded

Either instruction pushes the contents of the PC on thestack

and loads the PC with the address specified in the instruction.
Note that the PC will contain the address of the instruction
following the CALL instruction when it gets pushed on the
stack

The PC is pushed on the stack low-byte first, high-byte second

Subroutines should end with an RET instruction

RET pops the last two bytes off the stack and places them in the
PC

Jumping in or out of a subroutine any other way usually

fouls up the stack and causes the program to crash

Conditional Jump

The 8051 offers a variety of conditional jump instructions

JZ and JNZ tests the accumulator for a particular condition
DJNZ (decrement and jump if not zero) is a useful instruction for
building loops
To execute a loop N times, load a register with N and terminate the
loop with a DJNZ to the beginning of the loop
CJNE (compare and jump if not equal) is another conditional jump
instruction
CJNE: two bytes in the operand field are taken as unsigned
integers. If the first one is less than the second one, the carry is set
Example: It is desired to jump to BIG if the value of the
accumulator
is greater than or equal to 20H
CJNE A,#20H,$+3
JNC BIG
$ is an assembler symbol representing the address of the current
instruction
Since CJNE is a 3-byte instruction, $+3 is the address of next
instruction JNC

Delay Calculation

Delay Calculation

Increasing Delay Using

NOP

Large Delay Using

Nested Loop

8051 Instructions (1)

The 8051 Instruction set.

8051 Instructions (2)

The 8051 Instruction set.

8051 Instructions (3)

The 8051 Instruction set.