The PCI bus (Peripheral Component

Interconnect ) is the most commonly

used peripheral bus on desktops and
bigger computers.
higher-level bus architectures.
A bus is made up of both an electrical
interface and a programming interface.
The PCI Interface : a complete set of
specifications defining how different
parts of a computer should interact.
PCI driver can find its hardware and gain
access to it.

 The PCI architecture was designed as

a replacement for the ISA standard,
with three
main goals:
To get better performance when
transferring
data
between
the
computer and its peripherals.
To be as platform independent as
possible.
To simplify adding and removing
peripherals to the system.

PCI Addressing

Each PCI peripheral is identified by a

bus number, a device number, and a
function number.
The PCI specification permits a single
system to host up to 256 buses.
Each bus hosts up to 32 devices, and
each device can be a multifunction
board (such as an audio device with
an accompanying CD-ROM drive) with
a maximum of eight functions.

 Recent workstations feature at least two

PCI buses.
Plugging more than one bus in a single
system is accomplished by means of
bridges, special-purpose PCI peripherals
whose task is joining two buses.
The overall layout of a PCI system is a tree
where each bus is connected to an upperlayer bus, up to bus 0 at the root of the
tree.
The 16-bit hardware addresses associated
with PCI peripherals, hidden in the struct
pci_dev object.

 When the hardware address is displayed,

it can be shown as two values (an 8-bit
bus number and an 8-bit device and
function number), as three values (bus,
device, and function), or as four values
(domain, bus, device, and function)
$ lspci | cut -d: -f1-3
0000:00:00.0 Host bridge
0000:00:00.1 RAM memory
0000:00:00.2 RAM memory
0000:00:02.0 USB Controller

$ cat /proc/bus/pci/devices | cut -f1

0000
0001
0002
0010
0020
0030
$ tree /sys/bus/pci/devices/
/sys/bus/pci/devices/
|-- 0000:00:00.0 -> ../../../devices/pci0000:00/0000:00:00.0
|-- 0000:00:00.1 -> ../../../devices/pci0000:00/0000:00:00.1
|-- 0000:00:00.2 -> ../../../devices/pci0000:00/0000:00:00.2

 All three lists of devices are sorted in

the same order, since lspci uses
the /proc files as
its source of information. Taking the
VGA video controller as an example,
0x00a0
means 0000:00:14.

 Registering a PCI Driver

The main structure that all PCI drivers
must create in order to be registered
with the kernel properly is the struct
pci_driver structure

 to create a proper struct pci_driver

structure, only four fields need to be
initialized:
static struct pci_driver pci_driver = {
.name = "pci_skel",
.id_table = ids,
.probe = probe,
.remove = remove,
};

 To register the struct pci_driver with

the PCI core, a call to
pci_register_driver is
made with a pointer to the struct
pci_driver. This is traditionally done in
the module
initialization code for the PCI driver:
static int __init pci_skel_init(void)
{
return
pci_register_driver(&pci_driver);
}

 Peripheral Component Interconnect

(PCI), is a standard that describes
how to connect the peripheral
components of a system together in a
structured and controlled way.

Example PCI Based System

 PCI Address Spaces

The CPU and the PCI devices need to access
memory that is shared between them.
This memory is used by device drivers to control
the PCI devices and to pass information between
them.
The shared memory contains control and status
registers for the device.
These registers are used to control the device and
to read its status. For example, the PCI SCSI
device driver would read its status register to find
out if the SCSI device was ready to write a block of
information to the SCSI disk. Or it might write to
the control register to start the device running
after it has been turned on.

 Peripheral devices have their own memory spaces.

The CPU can access these spaces but access by
the devices into the system's memory is very
strictly controlled using DMA (Direct Memory
Access) channels.
ISA devices have access to two address spaces, ISA
I/O (Input/Output) and ISA memory.
PCI has three; PCI I/O, PCI Memory and PCI
Configuration space. All of these address spaces
are also accessible by the CPU with the PCI I/O and
PCI Memory address spaces being used by the
device drivers and the PCI Configuration space
being used by the PCI initialization code within the
Linux kernel.

The PCI Configuration Header

 Every PCI device in the system, including the

PCI-PCI bridges has a configuration data
structure that is somewhere in the PCI
configuration address space.
The PCI Configuration header allows the system
to identify and control the device.
Exactly where the header is in the PCI
Configuration address space depends on where
in the PCI topology that device is. For example,
a PCI video card plugged into one PCI slot on
the PC motherboard will have its configuration
header at one location and if it is plugged into
another PCI slot then its header will appear in
another location in PCI Configuration memory

 Vendor Identification A unique number describing

the originator of the PCI device. Digital's PCI Vendor
Identification is 0x1011 and Intel's is 0x8086.
Device Identification A unique number describing
the device itself. For example, Digital's 21141 fast
ethernet device has a device identification of 0x0009.
Status This field gives the status of the device with
the meaning of the bits of this field set by the
standard. .
Command By writing to this field the system controls
the device, for example allowing the device to access
PCI I/O memory, Class Code This identifies the type
of device that this is. There are standard classes for
every sort of device; video, SCSI and so on. The class
code for SCSI is 0x0100.

 Base Address Registers These registers are used to determine

and allocate the type, amount and location of PCI I/O and PCI
memory space that the device can use.
Interrupt Pin Four of the physical pins on the PCI card carry
interrupts from the card to the PCI bus. The standard labels these
as A, B, C and D. The Interrupt Pin field describes which of these
pins this PCI device uses. Generally it is hardwired for a pariticular
device. That is, every time the system boots, the device uses the
same interrupt pin. This information allows the interrupt handling
subsystem to manage interrupts from this device,
Interrupt Line The Interrupt Line field of the device's PCI
Configuration header is used to pass an interrupt handle between
the PCI initialisation code, the device's driver and Linux's interrupt
handling subsystem. The number written there is meaningless to
the the device driver but it allows the interrupt handler to correctly
route an interrupt from the PCI device to the correct device driver's
interrupt handling code within the Linux operating system

 PCI I/O and PCI Memory

Addresses
These two address spaces are used
by the devices to communicate with
their device drivers running in the
Linux kernel on the CPU. For
example, the DECchip 21141 fast
ethernet device maps its internal
registers into PCI I/O space. Its Linux
device driver then reads and writes
those registers to control the device.
Video drivers typically use large
amounts of PCI memory space to

 Linux PCI Initialization

The PCI initialisation code in Linux is broken into
three logical parts:
PCI Device Driver This pseudo-device driver
searches the PCI system starting at Bus 0 and
locates all PCI devices and bridges in the system. It
builds a linked list of data structures describing the
topology of the system. Additionally, it numbers all
of the bridges that it finds.
PCI BIOS This software layer provides the services
described in bib-pci-bios-specification. Even though
Alpha AXPdoes not have BIOS services, there is
equivalent code in the Linux kernel providing the
same functions.
PCI Fixup System specific fixup code tidies up the
system specific loose ends of PCI initialization.