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Lecture 13 State Minimization of Sequential Machines

This document discusses state minimization of sequential machines. It begins by defining state minimization as the process of transforming a machine into an equivalent machine with no redundant states. This removes unnecessary states to reduce cost, complexity, and aid failure analysis. The document then describes the state minimization procedure and equivalence partitions. It provides theorems about the uniqueness of the equivalence partition and distinguishability of states. Finally, it discusses determining state equivalence using implication tables, merger tables, merger graphs, and closed sets of compatibles.

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Shiraz Husain
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0% found this document useful (0 votes)
1K views42 pages

Lecture 13 State Minimization of Sequential Machines

This document discusses state minimization of sequential machines. It begins by defining state minimization as the process of transforming a machine into an equivalent machine with no redundant states. This removes unnecessary states to reduce cost, complexity, and aid failure analysis. The document then describes the state minimization procedure and equivalence partitions. It provides theorems about the uniqueness of the equivalence partition and distinguishability of states. Finally, it discusses determining state equivalence using implication tables, merger tables, merger graphs, and closed sets of compatibles.

Uploaded by

Shiraz Husain
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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VLSI

Circuits & Systems

Lecture 13
State Minimization
of Sequential Machines
State Minimization
State machines may contain redundant states, i.e. states whose
function can be accomplished by other states.

State minimization is the transformation of a given machine into an


equivalent machine with no redundant states.

Removal of redundant states is important because


 Cost: the number of memory elements is directly related to
the number of states
 Complexity: the more states the circuit contains, the more
complex the design and implementation becomes
 Aids failure analysis: diagnostic routines are often
predicated on the assumption that no redundant states exist
2
State Minimization Procedure
If Si and Sj are equivalent states, their corresponding X-successors, for all
X, are also equivalent: since otherwise it would be trivial to
construct a distinguishing sequence for (Si,Sj) by first applying an
input sequence that transfers the machine to the distinguishable
successors of Si and Sj Machine M1
Example: For machine M1
• P0, P1: 0-distinguishable, 1-distinguishable
• P2: two states placed in the same block if and
only if they are in the same block of P1, and
for each possible Ii, their Ii-successor is also
contained in a common block of P1
– 0- and 1-successor of (ACE): (CE), (BDF)
» Since both are contained in common
blocks of P1: states in (ACE) are
2-equivalent
– 0- and 1-successor of (BDF): (FB), (DBC)
» Since (DB) and (C) are not contained in a
3
single block of P1: (BDF) must be split into (BD) and (F), and so on
Equivalence Partition

 If Pn = Pn+1, i.e. next partition is same as


present partition, then all states contained in
same class of Pn are equivalent. Pn is called
equivalence partition.
Theorems

Theorem 10.1: The equivalence partition is unique


Proof: Suppose there exist two partitions, Pa and Pb, and that Pa /= Pb.
• Then there exist two states, Si and Sj, which are in the same block of one
partition and not in the same block of the other
Pa = (S1,S2)(S3, Si, Sj) (Sk)
Pb = (S1,S2) (S3, Si) (Sj) (Sk)
• Since Si and Sj are in different blocks of (say) Pb, there exists at least one input
sequence which distinguishes Si from Sj and, therefore, cannot be in the same
block of Pa

5
Theorems

Theorem 10.2: If two states, Si and Sj, of machine M of n states are


distinguishable, then they are distinguishable by a sequence of length n-1 or
smaller
Proof: P1 contains at least two blocks, else M is reducible to a combinational
circuit with a single state
• At each step, partition Pk+1 is smaller than or equal to Pk
– If Pk+1 is smaller than Pk, then it contains at least one more block than Pk
– However, since the number of blocks is limited to n, at most n-1 partitions
can be generated
– Thus, if Si and Sj are distinguishable, they are distinguishable by a
sequence of length n-1 or smaller

6
Machine Equivalence
Two machines, M1 and M2, are said to be equivalent if and only if, for every
state in M1, there is a corresponding state in M2, and vice versa
• The machine that contains no equivalence states and is equivalent to M is
called the minimal, or reduced, form of M

Example: Machine M1 Machine M1*

7
Machine Equivalence (Contd.)
Example: Machine M2 Machine M2

8
Determine the minimal state table equivalent to the
following:
Determine the minimal state table equivalent to the following
one.
P0 = (ABCDEFGH)

 P1 = (ACGH)(BDE)(F)
P2=(AH)(CG)(BDE)(F)
 P3 = (AH)(CG)(BDE)(F)
 (AH)A, (BDE)B, (CG)C, (F) F
Find the shortest input sequence that takes the
machine from state A to state G. State table is given
below.
Incompletely Specified Machines

 Next states and/or outputs are not specified for all states
 Applicable input sequences: an input sequence is applicable to state,
Si, of an incompletely specified circuit if and only if when the circuit is in
state Si and the input sequence is applied, all next states are specified
except for possible the last input of the sequence.
 Compatible states: two states Si and Sj are compatible if and only if for
each input sequence applicable to both states the same output
sequence will be produced when the outputs are specified.
 Compatible states: two states Si and Sj are compatible if and only if the
following conditions are satisfied for any possible input Ip
 The outputs produced by Si and Sj are the same, when both are specified
 The next states Sk and Sl are compatible, when both are specified.
 Incompatible states: two states are said to be incompatible if they are
not compatible.
Nonuniqueness of Reduced Machines

Example: Machine M4

• If we replace both dashes by 1’s: A and B become equivalent


• If we replace both dashes by 0’s: States A and E become equivalent; also,
B, C, and D become equivalent

• Both reduced machines cover M4: thus reduced machines are nonunique
• States A and B of M4 are compatible, C and D are also compatible, so are
A and E. However, B and E are 1-distinguishable, hence incompatible: 24
thus compatibility relation is not an equivalence relation
Implication Table Method
The implication table method of determining state
equivalence can be summarized as follows:

1. Construct a chart which contains a square for each pair of states.

2. Compare each pair of rows in the state table. If the outputs


associated with states i and j are different, place an X in square i-j to
indicate that i j. If the outputs are the same, place the implied pairs
in square i-j. (If the next states of i and j are m and n for some input
x, then m-n is an implied pair.) If the outputs and next states are the
same (or if i-j only implies itself), place a check (√) in square i-j to
indicate that i ≡ j.

25
Implication Table Method

3. Go through the table square-by-square. If square i-j


contains the implied pair m-n, and square m-n contains
an X, then i j, and an X should be placed in square i-j.
4. If any X’s were added in step 3, repeat step 3 until no
more X’s are added.
5. For each square i-j which does not contain an X, i ≡ j.

26
Merger Table
Merger table: more convenient alternative to the merger graph

Example: Machine M8 Merger table

B EF

AC,
C BC
EF

D EF

CD,
E
CF
AB, BC, BC,
F DE BD
DF DE CD

A B C D E

27
Finding the Set of Maximal Compatibles

Tabular counterpart to finding complete polygons in the merger graph:


1. Start in the rightmost column of the merger table and proceed left until a
column containing a compatible pair is encountered – list all compatible
pairs in that column
2. Proceed left to the next column containing at least one compatible pair.
If the state to which this column corresponds is compatible with all
members of some previously determined compatible, add this state to
that compatible to form a larger compatible. If the state is not compatible
with all members, but is compatible with some, form a new compatible
that includes those members and the state in question. Next, list all
compatible pairs not included in any previously derived compatible
3. Repeat step 2 until all columns have been considered. The final set of
compatibles constitutes the set of maximal compatibles

28
Maximal Compatibles (Contd.)

Example: B EF

AC,
C BC
EF
Column E: (EF)
D EF Column D: (EF), (DE)
CD, Column C: (CEF), (CDE)
E
CF
Column B: (CEF), (CDE), (BC)
AB, BC, BC,
F DE
DF DE
BD
CD Column A: (CEF), (CDE), (ABC), (AF)
A B C D E

• Set of maximal compatibles indicates that M8 can be covered by a four-


state machine, but not by a two-state machine

29
Implication Table Method / Merger Table
method

a ≡ b iff
d ≡ f and c≡h

a ≡ d iff
a ≡ d and c≡e

30
Implication Chart

31
Implication Chart

32
Implication Chart

33
Determination of Equivalent States
d is replaced with a
e is replaced with c
d and e are removed

34
Minimize the machine using implication
table method.

N.S.
PS X=0 X=1 OUTPUT
A E E 1
B C E 1
C I H 0
D H A 1
E I F 0
F E G 0
G H B 1
H C D 0
I F B 1

Prepared by Shiraz Husain


B E-C
C x
E-H
D E-A
E x
F x
E-H
G E-B
H x
E-F
I E-B
A B C D E F G H

Prepared by Shiraz Husain


Minimize the machine using implication
table method.

N.S.
PS X=0 X=1
A F,0 B,0
B F,0 G,0
C C,0 G,0
D A,1 B,0
E E,0 D,0
F A,0 B,0
G F,1 B,0

Prepared by Shiraz Husain


Differences

CSM ICSM
Reduced machine is Reduced machine is
unique. not unique.
Classes of partition Subsets of
have no common compatibles may be
state. overlapping.

Prepared by Shiraz Husain


Merger Graph
Merger graph of an n-state machine M is an undirected graph defined as
follows:
1. It consists of n vertices, each of which corresponds to a state of M
2. For each pair of states (SiSj) in M, whose next-state and output entries are
not conflicting, an undirected arc is drawn between vertices Si and Sj
3. If, for a pair of states (SiSj), the corresponding output symbols under all
input symbols are not conflicting, but the successors are not the same, an
interrupted arc is drawn between Si and Sj, and the implied pairs are
entered in the space
Example: Machine M6 Merger graph
A
F (CE) B
(AB) (EF)
(CD) (CF)
E (BE) C

D
Nine compatible pairs: (AB), (AC), (AD), (BC), (BD), (BE), (CD), (CF), (EF)
Set of maximal compatibles: {(ABCD), (BE), (CF), (EF)} – complete polygons 39
Closed Sets of Compatibles
A set of compatibles for machine M is said to be closed if: for every
compatible contained in the set, all its implied compatibles are also
contained in the set
• A closed set of compatibles, which contains all states of M, is called a
closed covering
Example: {(ABCD), (EF)} has the minimal number of compatibles covering
all states of M6
• It defines a lower bound on the number of states in the minimal machine
that covers M6
• However, if we select maximal compatible (ABCD) to be a state in the
reduced machine: then its I2- and I3-successors, (CF) and (BE), must also
be selected – since these are not in the above set, set {(ABCD), (EF)}
cannot be used to define the states of a minimal machine for M6
A
F (CE) B
(AB) (EF)
(CD) (CF)
E (BE) C
40
D
Closed Covering
A
Example (contd.): Closed covers:
• {(AD), (BE), (CF)} F (CE) B
• {(AB), (CD), (EF)} (AB) (EF)
(CD) (CF)
E (BE) C
Closed covering is not unique
• Aim is to find a closed covering that with a minimum
D number of compatibles
• Set of all maximal compatibles: clearly a closed covering
– This defines an upper bound on the number of states in the machine
that covers the original one:
» The upper bound is meaningless when the number of maximal
compatibles is larger than the number of states in the original
machine
• For the example: the lower bound is 2 and upper bound 4
– Thus, a closed covering with three compatibles defines a minimal
machine

41
Compatibility Graph
Compatibility graph: a directed graph whose vertices correspond to all
compatible pairs, and an arc leads from (SiSj) to (SpSq) if and only if (SiSj)
implies (SpSq)
Example: Machine M7 Merger graph Compatibility graph
A (AC)
(CE)
E (BC) B
(AD) (BE)
(AE)
(BC)
(BE) (AD)
(BC) (BC)
D (AB)
(DE) (CD)
C (DE)
A subgraph of the compatibility graph is closed: if, for every vertex in the
subgraph, all outgoing arcs and their terminating vertices also belong to it
• If every state of the machine is covered by at least one vertex of the
subgraph: then the subgraph forms a closed covering
– {(BC), (AD), (BE)}; {(AC), (BC), (AD), (BE)}; {(DE), (BC), (AD), (BE)}

Minimal machine
42
Maximal Compatibles (Contd.)

Example (contd.): Compatibility graph


(CE) (AC)

(BC)
(CF)
(AB)
(AF)
(EF)

(DE) (CD)

• Add (AB) to closed subgraph {(AC), (BC), (EF), (CD)}


– Reduces to the following closed covering: {(ABC), (CD), (EF)}
• Minimal machine:

43

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