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Cyclic Codes

This document discusses cyclic codes, which are an important subclass of linear codes. Cyclic codes have the property that any cyclic shift of a codeword is also a codeword. They can be described using generator polynomials or parity check matrices. Encoding and syndrome computation for error detection can be implemented efficiently using shift registers. Cyclic redundancy check (CRC) codes are a type of cyclic code that append error detecting bits to messages for burst error detection. CRC codes use generator polynomials and shift registers to encode and check messages efficiently with little hardware.

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Sabin Bhandari
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413 views15 pages

Cyclic Codes

This document discusses cyclic codes, which are an important subclass of linear codes. Cyclic codes have the property that any cyclic shift of a codeword is also a codeword. They can be described using generator polynomials or parity check matrices. Encoding and syndrome computation for error detection can be implemented efficiently using shift registers. Cyclic redundancy check (CRC) codes are a type of cyclic code that append error detecting bits to messages for burst error detection. CRC codes use generator polynomials and shift registers to encode and check messages efficiently with little hardware.

Uploaded by

Sabin Bhandari
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PPTX, PDF, TXT or read online on Scribd
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Information Theory

Cyclic Codes

Outline
1. Cyclic Codes
2. Description of Cyclic Codes
3. Generator Polynomial
4. Generator & Parity-check Matrices
5. Syndrome Computation & Error Detection
6. Cyclic Redundancy Check (CRC) codes

1.Cyclic Codes
An (n,k) linear code C is cyclic if every cyclic shift of a codeword in C
is also a codeword in C.
If v0 v1 v2 . vn-2 vn-1 is a codeword, then
vn-1 v0 v1 . vn-3 vn-2
vn-2 vn-1 v0 . vn-4 vn-3
: :
:
: :
v1 v2 v3 . vn-1 v0 are all codewords.
Cyclic codes form an important subclass of linear codes.
Encoding and syndrome computation can be implemented easily
by employing shift registers with feedback connections or linear
sequential circuits.
They have considerable inherent algebraic structure, it is possible
to find various practical methods for decoding them.

2.Description of Cyclic Codes


If the components of v = (v0, v1, ..., vn-1) are cyclically shifted one place to right
then we obtain :
v(1) = (vn-1, v0, v1, , vn-2)
If the components of v are cyclically shifted i places to right
v(i) = (vn-i, vn-i+1, , vn-1, v0, v1, , vn-i-1)

Polynomial representation of a codeword (code polynomial).


v(x) = v0 + v1x + + vn-1xn-1

3.Generator Polynomial
The nonzero code polynomial of minimum degree in a cyclic code C is called the
generator polynomial of C.
Consider an (n,k) cyclic code with generator polynomial
g(X) = g0 + g1X + + gn-kXn-k where

g(x) is unique and In GF(2), g0 = 1

v(x)=u(x)g(x) is also a code polynomial , where u(x) is the information polynomial.

A (7, 4) CYCLIC CODE GENERATED BY g(x) = 1+x+x3

Messages

Code Vectors

Code polynomials

(0000)

0000000

0 = 0g(x)

(1000)

1101000

1+x+x3 = 1g(x)

(0100)

0110100

x+x2+x4 = xg(x)

(1100)

1011100

1+x2+x3+x4 = (1+x)g(x)

(0010)

1110010

1+x+x2+x5 = (1+x2)g(x)

(1010)

0011010

x2+ x3+x5 = x2g(x)

(0110)

1000110

1+x4+x5 = (1+x+x2)g(x)

(1110)

0101110

x+x3+x4+x5 = (x+x2)g(x)

(0001)

1010 001

1+x2+x6 = (1+x+x3)g(x)

(1001)

0111001

x+x2+x3+x6 = (x+x3 )g(x)

(0101)

1100101

1+x+x4+x6 = (1+x3)g(x)

(1101)

0001101

x3+x4+x6 = x3g(x)

(0011)

0100011

x+x5+x6 = (x+x2+x3)g(x)

(1011)

1001011

1+x3+x5+x6 = (1+x+x2+x3)g(x)

(0111)

0010111

x2+ x4+x5+x6 = (x2+x3)g(x)

(1111)

1111111

1+x+x2+x3+x4+x5+x6 = (1+x2+x5)g(x)

4.Generator & Parity-check Matrices


v=uG
v(x) = (u0 + u1x + + uk-1xk-1)g(x)

G=

g0

g1

g2

g n k

0 0

g0

g1

g2

g nk

0 0

g0

g1

g2

g nk

0 0

.
.
.
0

.
.
.
0

0 g0

g1

g2

g nk

kxn

xn+1 = g(x)h(x) , g(x) is a factor of xn+1


where h(x) = h0 + h1x + + hkxk : parity polynomial

xkh(x-1) = hk + hk-1x + + h0xk So xkh(x-1) is also factor of xn+1 . And


generates an (n, n-k) cyclic code with the following (n-k)*n matrix as a
generator matrix.

4.Generator & Parity-check Matrices Contd.

H=

hk

h k 1

h k 2

h0

hk

h k 1

h k 2

h0

0
.

hk

h k 1

h k 2

h0

h k 1

h k 2

h0

.
.
0

0 hk

(n-k) x n

Note If v(x) = a(x)g(x)


v(x)h(x) = a(x)g(x)h(x) = a(x)(xn+1) = a(x) + xna(x)
H is a parity check matrix of the cyclic code C, parity check matrix H is
obtained from the polynomial h(x) and h(x) is the parity polynomial of C.
Hence a cyclic code is also uniquely specified by its parity polynomial.

5.Syndrome Computation & Error Detection


Suppose that a code vector is transmitted, r=(r0 , r1 , rn-1) be the
received vector, the received vector may not be same as the transmitted
code vector due to noise.
In the decoding of a linear code,
1st step is to compute the syndrome s= r.HT , If the syndrome is zero, r
is a code vector and the decoder accept r as the transmitted code vector
otherwise r is not a code vector and the presence of errors has been
detected.
The received vector r is treated as a polynomial of degree n-1 or less,
r(x) = r0 + r1x + + rn-1xn-1
Dividing r(x) by the generator polynomial g(x)
r(x) = a(x)g(x) + s(x)

5.Syndrome Computation & Error Detection


Contd.
s(x) = 0

r(x) is a code polynomial

syndrome

Gate
r(x)/g(x)

g2

g1

r(X)
Received
vector

s0

s1

gn-k-1

sn-k-1

Fig : An (n-k)-stage syndrome circuit with input from the left end

10

6.Cyclic Redundancy Check (CRC) codes


A systematic error detecting code
A group of error control bits (which is the remainder of a polynomial division
of a message polynomial by a generator polynomial) is appended to the end
of the message block.
With considerable burst-error detection capability.

11
Fig : CRC Generator and checker

6.Cyclic Redundancy Check (CRC) codes Contd.


Let M(x) be the message polynomial
Let g(x) be the generator polynomial
g(x) is fixed for a given CRC scheme
g(x) is known both by sender and receiver
Create a block polynomial C(x) based on M(x) and g(x) such that C(x) is
divisible by g(x).
Sending
1.

Multiply M(x) by xn

2.

Divide xnM(x) by g(x)

3.

Ignore the quotient and keep the reminder R(x)

4.

Form and send C(x) = xnM(x)+R(x)

12

6.Cyclic Redundancy Check (CRC) codes Contd.


Can be easily implemented with small amount of hardware
Shift registers
XOR (for addition and subtraction)

Receiving
1.

Receive C(x)

2.

Divide C(x) by g(x)

3.

Accept if remainder is 0, reject otherwise

13

Example
Send

Receive

M(x) = 110011 x5+x4+x+1 (6 bits)


g(x) = 11001 x4+x3+1 (5 bits, n = 4)
4 bits of redundancy
Form xnM(x) 110011 0000
x9+x8+x5+x4
Divide xnM(x) by g(x) to find R(x)

100001
11001 1100110000
11001
10000
11001

11001 1100111001
11001
11001
11001
00000
No remainder
Accept

1001= R(x)
Send the block 110011 1001

14

Thank You...

15

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