Flash Seminar
Flash Seminar
Flash Memory
Presented By:
Sajad sadeghi
Points of Discussion
Flash Memory Generalities
Examples of uses
Construction & Properties
History of Flash Memory
NOR & NAND Architectures
Capacity
Standardization
Future of Flash
Closing Statements
Flash Memory
Example applications include PDAs
(personal digital assistants), laptop
computers, digital audio players, digital
cameras and mobile phones. It has also
gained popularity in console video game
hardware, where it is often used instead of
EEPROMs or battery-powered static RAM
(SRAM) for game save data.
Flash Memory
A type of EEPROM (Electrically-Erasable
Programmable Read-Only Memory)
Non-volatile, solid state technology
Information is stored in an array of
memory cells made from floating-gate
(FG) transistors
Flash Memory
Packaged inside a memory card:
Extremely durable
Can withstand intense pressure
Immersion in water
Better kinetic shock resistance than hard
disks
Average power requirements range from
5V-12V
Flash Memory Cell
Flash Memory Cell Kinds
• Flashes (both NAND and NOR) are in
two kind :SLC and MLC
• SLC:single level cell,each cell stores a
bit ,so the speed is high.
• MLC:multi-level-cell ,each cell store
some cells up 4 bits so speed lower but
larger storage and less expensive with
less density
History of Flash Memory
Invented by Fujio Masuoka while he was
working for Toshiba in the early 1980s
First introduced at the 1984 International
Electron Devices Meeting in San
Francisco
History of Flash Memory
• Intel Corporation saw the massive
potential of the invention and introduced
the first commercial NOR type flash chip
in 1988
• Toshiba announced NAND flash at the
1987 International Electron Devices
Meeting.
NOR Flash Memory
Developed to replace read only memory
Full address and data buses allow random
access to any memory location
Can access any memory cell
Slow sequential access
Reading is byte by byte so it is a suitable for
ROM memories.(microprocessors & micro-
controllers)
NAND Flash Memory
Developed to replace hard disks
Smaller chip area per cell
Faster read/write time
does not provide a random-access external
address bus but uses blocks read
data must be read on a block-wise basis, with
typical block sizes of hundreds to thousands
of bits(64kb ,128kb,512kb)
Because of above property is not suitable for
ROM.
NOR & NAND
• Distinction :
• 1-the connection of memory's cells are
different.
• 2-reading & writing memory is
different(random-access and pages)
NOR NAND
Intel Samsung
AMD Toshiba
Samsung AMD
Micron National
Atmel Fujitsu
Mitsubishi
Standardization
Open NAND Flash Interface Working Group
developed standard low-level interface
Standard pinout:packages as tsop-48 wsop-
48 lga-52 and other.
Standard command set for reading, writing,
and erasing NAND flash chips
Mechanism for self-identification
The ONFI group is supported by major NAND
Flash manufacturers, including Hynix, Intel,
Micron Technology, and Numonyx.
Capacity
• Capacity:
– Follows the moors low(same IC tec)
– NANDs capacities history:
2005 2006 2008
Samsung
2G
Future of Flash Memory
• Instead of hard disk:
– Has not mechanical limitations and
latancy
– High reliability and speed
• Limitations:
– Cost per gigabyte of flash memory
remains significantly higher than that of
platter-based hard drives
– Write cycles not enough for OSs
Some attempts
• Some companies try to use both technology
using flash for cache and hard disk such as
hybrid drive and ReadyBoost
constructor capacity of
flash
Samsung 32 GB SSDs
Electronics
Taiwanese 32 GB 64GB
memory 128GB
company
Dell 32GB on
Computer laptop
In Closing…
One of the most popular alternatives for
portable device storage
Most capacity with lowest chip area are
still being made
Working on two new flashes AND &
DINOR
References
Wikipedia - Flash Memory
How Stuff Works - Flash Memory
http://smithsonianchips.si.edu
Some Works of Rob Douglas,
Alex Alexandrov
Questions?