Os Iv
Os Iv
Roy
Memory Management
The Main Memory
It is a large array of electronic storage units.
Each unit stores a BIT.
12/7/2014
Memory Mgt.
S. R. Roy
Memory Management
Programs and data reside in the memory words, in
Memory Mgt.
S. R. Roy
Memory Management
These addresses (that are used by programs) are
12/7/2014
Memory Mgt.
S. R. Roy
Memory Management
Binding
Let us consider the following program:
Phys. Add
0
Move 3
Add 4
Move 3
10
Move 3
Add 4
Add 4
11
Sta 5
Sta 5
12
Sta 5
10
10
13
15
15
14
25
5
Before execution
12/7/2014
15
After execution
Memory Mgt.
S. R. Roy
Memory Management
Multi-user
System
Single
User
System
Fence
Register
Base/Bound
Register
Memory Mgt.
Segmentation
/ Paging
Starting VM management
S. R. Roy
Fence Register
Processor checks all
memory references
to see if reference
is beyond fence
address
Limitation: can not
protect one user
from another
12/7/2014
Memory Mgt.
Address
0
Memory
Operating
System
n + 1
Fence
Register
User Program
Space
High
S. R. Roy
Memory
OS Kernel
bound.
Base
Register
User B
Program Space
Memory Mgt.
User A
Program Space
Bound
Register
S. R. Roy
User C
Program Space
Address Spaces
Address space
Set of addresses of memory
Physical Address space(PAS)
O to N-1,
N = size of memory
Kernel occupies lowest addresses
PAS
0
PM
kernel
N-1
12/7/2014
Memory Mgt.
S. R. Roy
process
LAS
0
N1 - 1
starts at 0
locations occupied in
Memory Mgt.
P2
PM
P2
P1
N2 - 1
P3
P3
N3 - 1
12/7/2014
P1
PAS
Compiler generated
Independent of
LM
S. R. Roy
N-1
10
12/7/2014
Memory Mgt.
S. R. Roy
11
12/7/2014
Memory Mgt.
S. R. Roy
12
physical address
12/7/2014
Memory Mgt.
S. R. Roy
13
12/7/2014
Memory Mgt.
S. R. Roy
14
Swapping
A process can be swapped temporarily out of memory to a backing store,
and then brought back into memory for continued execution
Major part of swap time is transfer time; total transfer time is directly
proportional to the amount of memory swapped
Modified versions of swapping are found on many systems (i.e., UNIX,
12/7/2014
Memory Mgt.
S. R. Roy
15
12/7/2014
Memory Mgt.
S. R. Roy
16
Swapping
Swap-time
Assume that
user program is 20 K words
average latency of backing store is 8ms
transfer rate is 250,000 words per sec.
Swap-in time = 8 ms + (20,000 words / 250,000 k words / sec)
= 8 ms + 2 / 25 sec
= 8 ms + 2000/ 25 ms = 8ms + 80 ms
= 88 ms
Total swap time = 2 X 88 ms = 176 ms
12/7/2014
Memory Mgt.
S. R. Roy
17
Swapping
For efficient CPU utilization, the execution time for each
We see that the major part of the swap time is the transfer
time.
memory swapped.
12/7/2014
Memory Mgt.
S. R. Roy
18
Swapping
Say, we have a 32 K memory system, and resident monitor of 12
K.
Therefore, max. user program is 20 K
12/7/2014
Memory Mgt.
S. R. Roy
19
Swapping
Swap time for a user program of 4 K would be
8 ms + ( 4000 / 250) ms = 24 ms
Thus, such a system (Dynamic Memory Requirement)
needs to issue system calls ( request / release memory)
to inform the resident monitor of its changing memory
needs.
12/7/2014
Memory Mgt.
S. R. Roy
20
Overlapped Swapping
o The primary objective is to overlap the swapping of
R-M
Bf-1
Bf-2
Prev.Pr.
Next Pr.
Fence
Running
User
12/7/2014
Memory Mgt.
S. R. Roy
21
Overlapped Swapping
Problem:
Assume that I/O operation are queued and a process
12/7/2014
Memory Mgt.
S. R. Roy
22
Memory Allocation
Memory allocation to a process involves specification of
Binding
Memory Mgt.
S. R. Roy
23
12/7/2014
Memory Mgt.
S. R. Roy
24
12/7/2014
Memory Mgt.
S. R. Roy
25
12/7/2014
Memory Mgt.
S. R. Roy
26
Memory Partitioning
Memory is divided into a number of partitions, each holds a
program or a process.
The degree of multiprogramming depends on the number of
partitions.
When a partition is free, a process is picked from the job queue
and is loaded into that free partition.
The allocation of memory partition is done using two schemes:
12/7/2014
Memory Mgt.
S. R. Roy
27
Memory Partitioning
IBMs OS/ 360 uses the following algorithms to implement the
aforesaid schemes:
Since many programs reside in the memory, the code and the
data of one program must be protected from being used by
some other program.
12/7/2014
Memory Mgt.
S. R. Roy
28
Memory Partitioning
Two bound registers are used per program:
Lower bound register holds the lowest physical address and the
Upper bound register holds the highest address.
Legal user addresses therefore range from the lower bound to the
0
upper bound.
Monitor
User-1
Lower
bound
User-2
User-3
Upper
bound
102400
12/7/2014
Memory Mgt.
S. R. Roy
29
Memory Partitioning
Base & Limit registers:
Base register holds the smallest physical address
Limit register holds the range of logical addresses.
12/7/2014
Memory Mgt.
S. R. Roy
30
12/7/2014
Memory Mgt.
S. R. Roy
31
MFT
Memory is partitioned into regions of fixed sizes that do
12/7/2014
Memory Mgt.
S. R. Roy
32
MFT
One of the strategies is to classify jobs into
12/7/2014
Memory Mgt.
S. R. Roy
33
MFT
12/7/2014
Memory Mgt.
S. R. Roy
34
MFT
RM
2K
6K
12K
12/7/2014
Memory Mgt.
S. R. Roy
35
MFT
RM
2K
6K
2K
3K
7K
7K
1K
4K
12/7/2014
Memory Mgt.
S. R. Roy
36
MFT
Job 1 is assigned 6K region
Job 2 is assigned 2K region
Job 3 requires 6K region, which has been assigned to job1,
hence it waits.
Though the region for job 4 is free, it can not be allocated as
12/7/2014
Memory Mgt.
S. R. Roy
37
MVT
12/7/2014
Memory Mgt.
S. R. Roy
38
OS
OS
OS
OS
process 5
process 5
process 5
process 5
process 9
process 9
process 8
process 2
12/7/2014
process 10
process 2
Memory Mgt.
process 2
S. R. Roy
process 2
39
12/7/2014
Memory Mgt.
S. R. Roy
40
Fragmentation
External Fragmentation total memory space exists to
12/7/2014
Memory Mgt.
S. R. Roy
41