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Stands For: Inter-Integrated Circuit Method For Data Transfer Between Devices Serial Connection Using Only 2 Wires Optimal For Low-Speed Components

I2C (Inter-Integrated Circuit) is a serial communication protocol used to connect low-speed peripheral devices to a motherboard, embedded system or cell phone. It uses just 2 wires for data transfer and was developed by Philips. I2C is useful for connecting sensors, real-time clocks, and other low-speed peripherals.

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192 views14 pages

Stands For: Inter-Integrated Circuit Method For Data Transfer Between Devices Serial Connection Using Only 2 Wires Optimal For Low-Speed Components

I2C (Inter-Integrated Circuit) is a serial communication protocol used to connect low-speed peripheral devices to a motherboard, embedded system or cell phone. It uses just 2 wires for data transfer and was developed by Philips. I2C is useful for connecting sensors, real-time clocks, and other low-speed peripherals.

Uploaded by

api-19646376
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PPT, PDF, TXT or read online on Scribd
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IC

Stands for: Inter-Integrated Circuit


Method for data transfer between devices
Serial connection using only 2 wires
Optimal for low-speed components
Inter-Integrated Circuit/ Inter Inter
Computer Communication

Developed and patented by Philips for connecting
low speed peripherals to a motherboard,
embedded system or cell phone

Multi-master, two wire bus , up to 100 kbits/sec
− One data line (SDA)
− One clock line (SCL)
− Master controls clock for slaves
− Each connected slave has a unique 7-bit address

External pull-up resistors needed to maintain both lines
high
Protocol

Transfers are byte oriented, msb first

Start: SDA goes low while SCL is high & then
SCL is made low

Master sends address of slave (7-bits) on next
7 clocks

Master sends read/write request bit
− 0-write to slave
− 1-read from slave

Slave ACKs by pulling SDA low on next clock

Data transfers now commence
The clock and valid data

Valid data should be on SDA before SCL rises
and the valid data should remain on SDA until
after SCL falls.

Only during two special events (called START
and STOP) should the SDA voltage change
while SCL is high.
Terminology

Transmitter – The device sending data to the bus

Receiver – Device receiving data from the bus

Master – device initiating a transfer, generates to clock
and terminates a transfer

Slave – Device addressed by the master

Multi-master – more than one master can attempt to
control the bus

Arbitration – procedure to insure that only one master has
control of ther bus at any instant

Synchronization – procedure to sync then clocks of two or
more devices
Master-to-Slave Data Transfer

Clock is controlled by master

Data is written to slave on next 8 clock pulses

Data receipt is ACKed by slave on 9th pulse by
pulling SDA low

When slave releases SDA master can send
next byte

Master will eventually set a Stop condition by
making a low to high transition on SDA with
SCL is high
Complete I2C Transfer
Master Writes to Slave

The clock and valid data


START and STOP conditions

START condition
− SDA falls while SCL is high – used by master to
signal that the bus is starting a new transaction.

STOP condition
− SDA rises while SCL is high – used by master to
signal that the bus is entering an idle state.

Idle state
− Both SDA and SCL idle high
− Bus is allowed to float to pull-up
Master Reads from Slave
I2C Extensions

10 bit addressing (up to 1024 addresses)
1

Fast mode – up to 400 kbits/sec

High-Speed – up to 3.4 Mbits/sec
Multi-master Capabilities

Multicontrollers can initiate data transfers on
the bus.

Both transmitters synchronizes the clock pulses
so that they match each other exactly.

During the address transmission, if a bit is
expected to be 1 by a master is actually a 0,
then it drops off the bus because another
master is on the bus.
I2C Bus Master Interface

Make sure the specified timings are not
violated.

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