Computer Architecture

Lecture 1: Introduction

Piotr Bilski
Plan of the Lectures
1. Introduction, history of the computers, Moore's Law
2. Structure of the computer system. System bus. Orders'
cycle
3. Logical systems. Computer's arithmetics
4. Processor's instruction list
5. Structure and work regime of the processor
6. Control Unit
7. Cache memory
8. Internal and external memory
9. Input/output devices
10. Operating system support
11. RISC processors
12. Superscalar processors
13. Parallel architectures
14. IA-64 architecture
Points and Grades
Two tests during the semester: 50
points MAX
Two programming projects: 50
points MAX
26 pts grade 3
31 pts grade 3,5
36 pts grade 4
41 pts grade 4,5
46 pts grade 5

References
W. Stallings, Computer Organization and Architecture.
Designing and Performance. 7th Edition, Prentice Hall,
2006.
A.J. van de Goor, High Performance Computer
Architecture, Prentice-Hall, 1989.
B. Wilkinson, Computer architecture (2nd ed.); Prentice-Hall
1996.
Hennessy, J.L. Patterson, Computer architecture a
quantitative approach (3nd ed.); Morgan Kaufman 2005.
J. Silc, B. Robin, T. Ungerer, Processors architecture: from
dataflow to superscalar and beyond; Springer-Verlag 1999.
Organization and Architecture of
the Computer System
Organization determines operational units
and connections between them, which
realize architecture
Architecture describes attributes
(characteristics) of the computer system,
visible (accessible) for the programmer
Definition of the Computer
Computer is, in general meaning,
computing machine, used for processing
of the information represented in the digital
form or as the continuous signal
What is the difference between the
calculator and the computer?
Classification of the Computers
Size of the instruction set
RISC
CISC
Method of the data processing
Serial (scalar)
Parallel
Matrix
Vector
Multiprocessor
Application
Universal
Problem-oriented
Specialized
Breadth of the address bus
8-bit
16-bit
32-bit
64-bit
Functional Scheme of the Computer
Data storing
module
Control
module
Data
processing
module
Transfer data
module
Environment
Data
transmission
Data storage
Internal
processing of data
Data processing
with transmission
Phases of the Computer
Development
1. Computers based on the vacuum lamps (1946-
1957)
2. Transistor-based computers (1958-1964)
3. SSI, MSI structure-based computers (1965-
1971)
4. LSI structure-based computers (1972-1977)
5. VLSI structure-based computers (1978-??)
6. New architectures: molecular, quantum, optical,
neurocomputers
Phases of the Processor
Development (Intel)
1. 8-bit processors (8086-80188)
2. 16-bit processors (80286)
3. First 32-bit processors (80386)
4. 486 family (80486)
5. Pentium family (80586)
6. Pentium Pro family (80686)
7. Pentium IV family
8. 64-bit processors (Pentium IV Extreme)
9. Multicore processors (Dual Core, Core2Duo,
Core2Quad, X2, X4, i7)
Pentium and PowerPC
PowerPC:
Manufactured by
IBM-Apple-Motorola
The best RISC
processor
Models: 601, 603,
604, 620, G3, G4
Currently installed in
the network devices,
printers (Kyocera)
and consoles (PS3,
Nintendo Wii)
Pentium:
Manufactured by Intel
Classical superscalar
representative of the
x86 architecture
Pentium, Pentium II,
Pentium Pro, Pentium
IV, IA-64 (64-bit!)
ENIAC (J.P. Eckert, J.W. Maulchy - 1946)
Considered (erroneously) as the first computer in
the world
Calculations in the decimal system (no memory)
Weight 30 tons, 20 thousand of the vacuum
lamps inside, 5000 op/s, power required: 140 kW
Applications: calculations for the military (missiles
ballistics, viability to construct the hydrogen bomb)
Commercial Computers (since 1951)
701, 702 (IBM)
UNIVAC I (Sperry-
Rand Corporation)
Characteristics:
Central Processing Unit (CPU) based on the vacuum lamps
Operational memory based on the ferrite rings or electrostatic
lamps
The First Microprocessor (1971)
Developed in the Intel company, labelled
as 4004 (author: Ted Hoff)
Built from 2300 transistors
Impemented operation of adding two 4-bit
numbers
100 kHz clock
The First General Purpose
Processor (1974)
Signature: 8080
8-bit processor
Clock speed: 2 MHz
6000 of transistors in the circuit
64 kB of addressable memory
Apple II Computer (1977)
The first one to present the
colour graphics
Open architecture (easy to
expand)
MOS 6502 processor (1MHz to 3
MHz)
RAM memory 4KB, max. 64 KB
WOZ Integer Basic operating
system
IBM PC/XT Computer (1983)
Intel 8088 processor
(4,77 MHz), later (in the
turbo mode) to 14 MHz
RAM memory max.
640 kB
8-bit ISA bus
Later replaced by IBM
PC/AT and IBM
PC/XT/286
Moores Law (1965)
Economically optimal number of the
transistors in the integrated chip will be
doubled every 18 months
Gordon Moore (born in 1929, San
Francisco, California), PhD in physics in
1954 r. One of the founders of the Intel
corporation in 1968 r.
Computational power of the microprocessors
will be doubled every 18 months, assuming
constant production cost
Moore's Law (cont.)
Original drawing from Moore's paper (1965)
Moores Law (cont.)
If the car technology in 1971 was accelerating in the same pace as
microelectronics, today we would travel from San Francisco to New
York within 13 seconds
0,1
1
10
100
1000
10000
1970 1975 1980 1985 1990 1995 2000 2005 2010 2015
years
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Increase of the Integration
Scale in Time
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Performance Gap
Efficiency advancement of processors and
memory was not uniform
Frequencies of the processor clock are
much greater than these of memory
Numerous methods of compensating for
this gap are applied:
Increasing of the memory clock
Increasing of the cache memory size
Modifying the sequence of the instructions
execution flow
Illustration of the Performance Gap
Problem of the physical limitations
Size of transistors cannot be decreased
indefinitely!
A significant problem is the heat emission
(cooling issue!)
Processor core has a crucial influence on
the calculations efficiency and emitted heat
Comparison of Single- and
Multicore Architectures
Single core Multiprocessor Multicore


cache


cache


cache


cache
Turing Machine (1937)
The first theoretical model of the computer
Was used to design the Colossus computer
Symbols are read from the tape, result of the
calculations is also stored on the tape
1 0 B 2 F 6 ?
Head
control
tape
head
Work Regime of the Turing Machine
Control unit is the processor, moving over the
tape and performing write/read operations
Control unit's action depends on the symbol
read from the tape and state of the control unit
Instruction of the Turing machine:

(S
0
, q
i
, S
z
, q
j
, L/P)
Operational part of the instruction Identification part of the instruction
von Neumann Architecture (1945)
Universal uniprocessor architecture, the base for
the modern computers
First practical realization: IAS computer (1952)
Functional structure:
Central Processing Unit (CPU) consisting of
the Arithmetical-Logical Unit (ALU) and
Control Unit (CU)
Main memory used to store data and
instructions
Input/output modules
Organization of the von
Neumann Machine
main
memory
I/O
devices
CPU
Computational part of the CPU
Control part of the
CPU
MBR
AC
MAR
PC IR
CU
ALU
Internal
bus
System bus