Presentation On Ic 555 Timer: BY: Sandeep Kumar
Presentation On Ic 555 Timer: BY: Sandeep Kumar
TED TO: M R PA R V E S H
DWIVEDI
It provided circuit designers with a relatively cheap, stable, and user-friendly integrated circuits.
Burglar Alarms
Measurement ,Process & Control Circuits Missing pulse detectors Traffic light control Automatic Battery chargers Logic probes DC to DC Converters etc.
- Traffic Lights
Infra Red (IR) remote control
PIN CONFIGURATION
PIN DESCRIPTIONS Pin 1 (Ground):- All voltages are measured w.r.t. this terminal. This is the most negative supply potential of the device. Pin 2 (Trigger Terminal ) This pin is an inverting input to a lower comparator. This is used to set the flip flop which causes the output to go high. Pin 4 (Reset):- To disable or reset the timer a negative pulse is applied to this pin. When this pin isnt used, its connected to Vcc.
Pin 6 (Threshold):- This is an input to the upper comparator. Used to reset the flip-flop which drives the output low.
Pin 7 (Discharge) -When the npn transistor connected to it is turned on, the pin is shorted to ground The timing capacitor is usually between pin 7 and ground and is discharged when the transistor turns on. Pin 8 (Supply Voltage):- A positive supply voltage is applied to this terminal
MONOSTABLE MULTIVIBRATOR
WORKING PRINCIPLE OF CIRCUIT A resistive voltage divider consisting of 3 equal resistors R1 is employed VTH= 2Vcc/3 for comparator 1. Flip Flop is reset whenever threshold goes higher than 2Vcc/3. VTL=Vcc/3 Flip Flop is set whenever the trigger goes below Vcc/3. In set state output Q is high (approx. equal to
In the stable the flip flop will be in reset state, thus Q will be high and Q low. Transistor Q1 is driven into saturation
VCE 0 so the capacitor is shorted to ground. i.e. VC 0 and output of comparator 1 is low
Vtrigger is kept high (higher than VTL i.e. Vcc/3) Output of comparator 2 will also be low. Flip flop is in reset state so Q will also be low i.e. V0 0 To trigger the monostable multivibrator , a negative pulse is applied to the trigger input terminal
As Vtrigger goes below VTL i.e. Vcc/3, the output of comparator 2 goes high thus setting the flip flop. i.e. Q=1 Q =0, so the transistor is cutoff. Vtrigger is given for a short time so output of compartor 2 goes low again. Still the ouput is high because R=0 and S=0 result in Q to be in the previous state. Capacitor C now begins to charge through resistor R and Vc rises exponentially towards Vcc. The high voltage at the ouput is retained as long as Vc<VTH
Once Vc exceeds VTH , the output of comparator 1 goes high. Now R=1 and S=0 so Q=0 . The monostable multivibrator is now back in its stable state and is ready to receive a new triggering pulse
The width of the pulse , T is the time interval that the monostable multivibrator spends in quasi stable state. Denoting the time instant at which the trigger pulse is applied at t=0 , the voltage across capacitor Vc can be expressed As:
Substituting Vc=VTH=2/3Vcc at t=T gives, T=RC ln 3 =1.1 RC
ASTABLE OPERATION
i) Assume the initial is HIGH. Transistor Q1 OFF and capacitor is charging through resistor RA and RB.
ii) When capacitor voltage reach 2/3 Vee, Comparator 1 will trigger flip flop and output change from change from HIGH to LOW. Resistor RB and transistor Q1.
iii) When the capacitor voltage reach 1/3 Vee, comparator output 2 will trigger flip flop so the timer output is HIGH. The cycle is repeated.
Period for capacitor charging from 1/3 Vcc to 2/3 Vcc same as period for HIGH output at timer. Period for capacitor discharging from 2/3Vcc to 1/3 Vcc same as period for LOW output.
Period for capacitor discharging from 2/3Vcc to 1/3 Vcc same as period for LOW output.
TH = 0.693 (RA+RB) C TL = 0.693 (RB) C Period, T = TH + TL = 0.693 (RA + 2RB) C Frequency, f = 1/T = 1/ (TH + TL) = 1.44 / ((RA + 2RB) C)
% Duty Cycle = [TH / (TH + TL) ]x 100 = [(RA + RB) / (RA + 2RB)]
23
THANK YOU