8051 Real Time Control

By K. SAI KRISHNA Assistant Professor

8051 timer/counter

Timers /Counters Programming

The 8051 has 2 timers/counters: timer/counter 0 and timer/counter 1. They can be used as 1. The timer is used as a time delay generator.
The clock source is the internal crystal frequency of the 8051.

2. An event counter.
External input from input pin to count the number of events on registers. These clock pulses cold represent the number of people passing through an entrance, or the number of wheel rotations, or any other event that can be converted to pulses.

Timer
Set the initial value of registers Start the timer and then the 8051 counts up. Input from internal system clock (machine cycle) When the registers equal to 0 and the 8051 sets a bit to denote time out 8051
P2 P1
TH0 TL0

Set Timer 0

to LCD

Counter
Count the number of events
Show the number of events on registers External input from T0 input pin (P3.4) for Counter 0 External input from T1 input pin (P3.5) for Counter 1 External input from Tx input pin. We use Tx to denote T0 or T1.

8051
TH0

P1
TL0

to LCD

P3.4 a switch T0

Registers Used in Timer/Counter

TH0, TL0, TH1, TL1 TMOD (Timer mode register) TCON (Timer control register) Since 8052 has 3 timers/counters, the formats of these control registers are different.
T2CON (Timer 2 control register), TH2 and TL2 used for 8052 only.

Basic Registers of the Timer

Both timer 0 and timer 1 are 16 bits wide.
These registers stores the time delay as a timer the number of events as a counter Timer 0: TH0 & TL0 Timer 0 high byte, timer 0 low byte Timer 1: TH1 & TL1 Timer 1 high byte, timer 1 low byte Each 16-bit timer can be accessed as two separate registers of low byte and high byte.

Timer Registers
TH0
D15 D14 D13 D12 D11 D10 D9 D8

TL0
D7 D6 D5 D4 D3 D2 D1 D0

Timer 0

TH1
D15 D14 D13 D12 D11 D10 D9 D8

TL1
D7 D6 D5 D4 D3 D2 D1 D0

Timer 1

TMOD Register
Timer mode register: TMOD
MOV TMOD,#21H An 8-bit register Set the usage mode for two timers Set lower 4 bits for Timer 0 (Set to 0000 if not used) Set upper 4 bits for Timer 1 (Set to 0000 if not used) Not bit-addressable

(MSB) GATE C/T M1 Timer 1

M0 GATE C/T M1 Timer 0

(LSB) M0

Figure 9-3. TMOD Register

GATE Gating control when set. Timer/counter is enabled only while the INTx pin is high and the TRx control pin is set. When cleared, the timer is enabled whenever the TRx control bit is set. C/T Timer or counter selected cleared for timer operation (input from internal system clock). Set for counter operation (input from Tx input pin). M1 Mode bit 1 M0 Mode bit 0
(MSB) GATE C/T M1 Timer 1 M0 GATE C/T M1 Timer 0 (LSB) M0

C/T (Clock/Timer)
This bit is used to decide whether the timer is used as a delay generator or an event counter. C/T = 0 : timer C/T = 1 : counter

Gate
Every timer has a mean of starting and stopping.
GATE=0 Internal control The start and stop of the timer are controlled by way of software. Set/clear the TR for start/stop timer. GATE=1 External control The hardware way of starting and stopping the timer by software and an external source. Timer/counter is enabled only while the INT pin is high and the TR control pin is set (TR).

M1, M0
M0 and M1 select the timer mode for timers 0 & 1.
M1 M0 Mode 0 0 0 0 1 1 0 1 2 Operating Mode 13-bit timer mode 8-bit THx + 5-bit TLx (x= 0 or 1) 16-bit timer mode 8-bit THx + 8-bit TLx 8-bit auto reload 8-bit auto reload timer/counter; THx holds a value which is to be reloaded into TLx each time it overflows. Split timer mode

Example 9-3
Find the value for TMOD if we want to program timer 0 in mode 2, use 8051 XTAL for the clock source, and use instructions to start and stop the timer. Solution:
timer 1 timer 0

TMOD= 0000 0010 Timer 1 is not used. Timer 0, mode 2, C/T = 0 to use XTAL clock source (timer) gate = 0 to use internal (software) start and stop method.

Timer modes

TCON Register (1/2)

Timer control register: TMOD
Upper nibble for timer/counter, lower nibble for interrupts

TR (run control bit)

TR0 for Timer/counter 0; TR1 for Timer/counter 1. TR is set by programmer to turn timer/counter on/off. TR=0: off (stop) TR=1: on (start)

(MSB) TF1 TR1 Timer 1

TF0 TR0 Timer0

IE1

IT1 IE0 for Interrupt

(LSB) IT0

TCON Register (2/2)

TF (timer flag, control flag)
TF0 for timer/counter 0; TF1 for timer/counter 1. TF is like a carry. Originally, TF=0. When TH-TL roll over to 0000 from FFFFH, the TF is set to 1. TF=0 : not reach TF=1: reach If we enable interrupt, TF=1 will trigger ISR.

(MSB) TF1 TR1 Timer 1

TF0 TR0 Timer0

IE1

IT1 IE0 for Interrupt

(LSB) IT0

Equivalent Instructions for the Timer Control Register

For timer 0 SETB TR0 CLR TR0 SETB TF0 CLR TF0 For timer 1 = = = = SETB TCON.4 CLR TCON.4 SETB TCON.5 CLR TCON.5

SETB TR1 CLR TR1 SETB TF1 CLR TF1

= = = =

SETB TCON.6 CLR TCON.6 SETB TCON.7 CLR TCON.7

TCON: Timer/Counter Control Register

TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0

Timer Mode 1
In following, we all use timer 0 characteristics.
16-bit timer (TH0 and TL0) TH0-TL0 is incremented continuously when TR0 is set to 1. And the 8051 stops to increment TH0-TL0 when TR0 is cleared. The timer works with the internal system clock. In other words, the timer counts up each machine cycle. When the timer (TH0-TL0) reaches its maximum of FFFFH, it rolls over to 0000, and TF0 is raised.

Programmer should check TF0 and stop the timer 0.

Steps of Mode 1 (1/3)

1. Choose mode 1 timer 0
MOV TMOD,#01H

2. Set the original value to TH0 and TL0.

MOV TH0,#FFH MOV TL0,#FCH

3. You had better to clear the flag to monitor: TF0=0.

CLR TF0

4. Start the timer.

SETB TR0

Steps of Mode 1 (2/3)

5. The 8051 starts to count up by incrementing the TH0-TL0.
TH0-TL0= FFFCH,FFFDH,FFFEH,FFFFH,0000H
TR0=1 Start timer

TH0

TL0

TR0=0 Stop timer

FFFC
TF = 0

FFFD
TF = 0
TF

FFFE TF = 0

FFFF
TF = 0

0000
TF = 1

Monitor TF until TF=1

Steps of Mode 1 (3/3)

6. When TH0-TL0 rolls over from FFFFH to 0000, the 8051 set TF0=1.
TH0-TL0= FFFEH, FFFFH, 0000H (Now TF0=1)

7. Keep monitoring the timer flag (TF) to see if it is raised.

AGAIN: CLR TR0 JNB TF0, AGAIN

8. Clear TR0 to stop the process. 9. Clear the TF flag for the next round.
CLR TF0

Mode 1 Programming
XTAL oscillator

12
C/T = 0

Timer overflow flag

TH TL TF

TR

TF goes high when FFFF

Timer Delay Calculation for XTAL = 11.0592 MHz

(a) in hex (FFFF YYXX + 1) 1.085 s where YYXX are TH, TL initial values respectively. Notice that values YYXX are in hex.
(b) in decimal Convert YYXX values of the TH, TL register to decimal to get a NNNNN decimal number then (65536 NNNNN) 1.085 s

Example 9-4 (1/3)

square wave of 50% duty on P1.5 Timer 0 is used ;each loop is a half clock MOV TMOD,#01 ;Timer 0,mode 1(16-bit) HERE: MOV TL0,#0F2H ;Timer value = FFF2H MOV TH0,#0FFH CPL P1.5 ACALL DELAY P1.5 SJMP HERE 50% 50% whole clock

Example 9-4 (2/3)

;generate delay using timer 0 DELAY: SETB TR0 ;start the timer 0 AGAIN:JNB TF0,AGAIN CLR TR0 ;stop timer 0 CLR TF0 ;clear timer 0 flag RET

FFF2
TF0 = 0

FFF3
TF0 = 0

FFF4
TF0 = 0

FFFF
TF0 = 0

0000
TF0 = 1

Solution: In the above program notice the following steps.

Example 9-4 (3/3)

1. TMOD = 0000 0001 is loaded. 2. FFF2H is loaded into TH0 TL0. 3. P1.5 is toggled for the high and low portions of the pulse. 4. The DELAY subroutine using the timer is called. 5. In the DELAY subroutine, timer 0 is started by the SETB TR0 instruction. 6. Timer 0 counts up with the passing of each clock, which is provided by the crystal oscillator. As the timer counts up, it goes through the states of FFF3, FFF4, FFF5, FFF6, FFF7, FFF8, FFF9, FFFA, FFFB, FFFC, FFFFD, FFFE, FFFFH. One more clock rolls it to 0, raising the timer flag (TF0 = 1). At that point, the JNB instruction falls through. 7. Timer 0 is stopped by the instruction CLR TR0. The DELAY subroutine ends, and the process is repeated. Notice that to repeat the process, we must reload the TL and TH registers, and start the timer again (in the main program).

Example 9-9 (1/2)

This program generates a square wave on pin P1.5 Using timer 1 Find the frequency.(dont include the overhead of instruction delay) XTAL = 11.0592 MHz

MOV AGAIN:MOV MOV SETB BACK: JNB CLR CPL CLR SJMP

TMOD,#10H TL1,#34H TH1,#76H TR1 TF1,BACK TR1 P1.5 TF1 AGAIN

;timer 1, mode 1 ;timer value=7634H ;start ;stop ;next half clock ;clear timer flag 1 ;reload timer1

Example 9-9 (2/2)

Solution:
FFFFH 7634H + 1 = 89CCH = 35276 clock count Half period = 35276 1.085 s = 38.274 ms Whole period = 2 38.274 ms = 76.548 ms Frequency = 1/ 76.548 ms = 13.064 Hz.

Note
Mode 1 is not auto reload then the program must reload the TH1, TL1 register every timer overflow if we want to have a continuous wave.

Find Timer Values

Assume that XTAL = 11.0592 MHz . And we know desired delay how to find the values for the TH,TL ?
1. 2. 3. 4. Divide the delay by 1.085 s and get n. Perform 65536 n Convert the result of Step 2 to hex (yyxx ) Set TH = yy and TL = xx.

Example 9-12 (1/2)

Assuming XTAL = 11.0592 MHz, write a program to generate a square wave of 50 Hz frequency on pin P2.3.

Solution:
1. 2. 3. 4. 5. The period of the square wave = 1 / 50 Hz = 20 ms. The high or low portion of the square wave = 10 ms. 10 ms / 1.085 s = 9216 65536 9216 = 56320 in decimal = DC00H in hex. TL1 = 00H and TH1 = DCH.

Example 9-12 (2/2)

MOV AGAIN: MOV MOV SETB BACK: JNB CLR CPL CLR SJMP TMOD,#10H TL1,#00 TH1,#0DCH TR1 TF1,BACK TR1 P2.3 TF1 AGAIN ;timer 1, mode 1 ;Timer value = DC00H ;start ;stop ;clear timer flag 1 ;reload timer since ;mode 1 is not ;auto-reload

Generate a Large Time Delay

The size of the time delay depends on two factors: They crystal frequency The timers 16-bit register, TH & TL The largest time delay is achieved by making TH=TL=0. What if that is not enough? Next Example show how to achieve large time delay

Example 9-13
Examine the following program and find the time delay in seconds. Exclude the overhead due to the instructions in the loop.

MOV TMOD,#10H MOV R3,#200 AGAIN: MOV TL1,#08 MOV TH1,#01 SETB TR1 BACK: JNB TF1,BACK CLR TR1 CLR TF1 DJNZ R3,AGAIN Solution: TH TL = 0108H = 264 in decimal 65536 264 = 65272. One of the timer delay = 65272 1.085 s = 70.820 ms Total delay = 200 70.820 ms = 14.164024 seconds

Timer Mode 0
Mode 0 is exactly like mode 1 except that it is a 13-bit timer instead of 16-bit.
8-bit TH0 5-bit TL0

The counter can hold values between 0000 to 1FFF in TH0-TL0.

213-1= 2000H-1=1FFFH

We set the initial values TH0-TL0 to count up. When the timer reaches its maximum of 1FFFH, it rolls over to 0000, and TF0 is raised.

Timer Mode 2
8-bit timer.
It allows only values of 00 to FFH to be loaded into TH0.

Auto-reloading TL0 is incremented continuously when TR0=1. next example: 200 MCs delay on timer 0. See Examples 9-14 to 9-16

Steps of Mode 2 (1/2)

1. Chose mode 2 timer 0
MOV TMOD,#02H

2. Set the original value to TH0.

MOV TH0,#38H

3. Clear the flag to TF0=0.

CLR TF0

4. After TH0 is loaded with the 8-bit value, the 8051 gives a copy of it to TL0.
TL0=TH0=38H

5. Start the timer.

SETB TR0

Steps of Mode 2 (2/2)

6. The 8051 starts to count up by incrementing the TL0.
TL0= 38H, 39H, 3AH,....

7. When TL0 rolls over from FFH to 00, the 8051 set TF0=1. Also, TL0 is reloaded automatically with the value kept by the TH0.
TL0= FEH, FFH, 00H (Now TF0=1) The 8051 auto reload TL0=TH0=38H. Clr TF0 Go to Step 6 (i.e., TL0 is incrementing continuously).

Note that we must clear TF0 when TL0 rolls over. Thus, we can monitor TF0 in next process. Clear TR0 to stop the process.
Clr TR0

Timer 1 Mode 2 with internal Input

XTAL oscillator

12
C/T = 0

TL1 reload TR1 TH1

TF1

overflow flag

TF goes high when FF

Example 9-15
Find the frequency of a square wave generated on pin P1.0. Solution: MOV TMOD,#2H ;Timer 0,mode 2 MOV TH0,#0 AGAIN:MOV R5,#250 ;count 250 times ACALL DELAY CPL P1.0 SJMP AGAIN DELAY:SETB BACK: JNB CLR CLR DJNZ RET TR0 TF0,BACK TR0 TF0 R5,DELAY ;start ;wait until TL0 ovrflw auto-reload ;stop ;clear TF

T = 2 (250 256 1.085 s) = 138.88 ms, and frequency = 72 Hz.

Example 9-16
Assuming that we are programming the timers for mode 2, find the value (in hex) loaded into TH for each of the following cases. (a) MOV TH1,#-200 (b) MOV TH0,#-60 (c) MOV TH1,#-3 (d) MOV TH1,#-12 (e) MOV TH0,#-48
Solution: Some 8051 assemblers provide this way. -200 = -C8H 2s complement of 200 = 100H C8H = 38 H

Decimal -200 = - C8H - 60 = - 3CH - 3 - 12 - 48

2s complement (TH value) 38H C4H FDH F4H D0H

Example 9-17 (1/2)

Find (a) the frequency of the square wave generated in the following code (b) the duty cycle of this wave. Solution: MOV TH0,#-150 uses 150 clocks. The DELAY subroutine = 150 1.085 s = 162 s. The high portion is twice tat of the low portion (66% duty cycle). The total period = high portion + low portion T= 325.5 s + 162.25 s = 488.25 s Frequency = 2.048 kHz.

Example 9-17 (2/2)

MOV TMOD,#2H MOV TH0,#-150 AGAIN:SETB P1.3 ACALL DELAY ACALL DELAY CLR P1.3 ACALL DEALY SJMP AGAIN DELAY:SETB BACK: JNB CLR CLR RET TR0 TF0,BACK TR0 TF0 ;Timer 0,mode 2 ;Count=150

high period
low period

;start ;stop ;clear TF

Counter
These timers can also be used as counters counting events happening outside the 8051. When the timer is used as a counter, it is a pulse outside of the 8051 that increments the TH, TL. When C/T=1, the counter counts up as pulses are fed from
T0: timer 0 input (Pin 14, P3.4) T1: timer 1 input (Pin 15, P3.5)

Port 3 Pins Used For Timers 0 and 1

Pin Port Pin Function Description

14 15

P3.4 P3.5

T0 T1

Timer/Counter 0 external input Timer/Counter 1 external input

(MSB) GATE C/T=1 M1 Timer 1 M0 GATE C/T=1 M1 Timer 0

(LSB) M0

Timer/Counter selection

Counter Mode 1
16-bit counter (TH0 and TL0) TH0-TL0 is incremented when TR0 is set to 1 and an external pulse (in T0) occurs. When the counter (TH0-TL0) reaches its maximum of FFFFH, it rolls over to 0000, and TF0 is raised. Programmers should monitor TF0 continuously and stop the counter 0. Programmers can set the initial value of TH0-TL0 and let TF0=1 as an indicator to show a special condition. (ex: 100 people have come).

Timer 0 with External Input (Mode 1)

Timer 0 external input Pin 3.4 C/T = 1 TR0 overflow flag TH0 TL0 TF0

TF0 goes high when FFFF 0

Counter Mode 2
8-bit counter.
It allows only values of 00 to FFH to be loaded into TH0.

Auto-reloading TL0 is incremented if TR0=1 and external pulse occurs. See Figure 9.6, 9.7 for logic view See Examples 9-18, 9-19

Example 9-18 (1/2)

Assuming that clock pulses are fed into pin T1, write a program for counter 1 in mode 2 to count the pulses and display the state of the TL 1 count on P2. Solution:
MOV MOV SETB AGAIN:SETB BACK: MOV MOV JNB CLR CLR SJMP TMOD,#01100000B TH1,#0 P3.5 TR1 A,TL1 P2,A TF1,Back TR1 TF1 AGAIN ;mode 2, counter 1 ;make T1 input port ;start

;display in P2 ;overflow ;stop ;make TF=0 ;keep doing it

Example 9-18 (2/2)

Timer 1 as an event counter fed into pin3.5. SETB P3.5 make P3.5 an input port by making it high

8051
P2 is connected to 8 LEDs and input T1 to pulse.

P2 P3.5

to LEDs

T1

8051 Interrupts

Interrupts Programming
An interrupt is an external or internal event that interrupts the microcontroller to inform it that a device needs its service. Interrupts vs. Polling A single microcontroller can serve several devices. There are two ways to do that:
interrupts polling.

The program which is associated with the interrupt is called the interrupt service routine (ISR) or interrupt handler.

Steps in executing an interrupt

Finish current instruction and saves the PC on stack.
Jumps to a fixed location in memory depend on type of interrupt Starts to execute the interrupt service routine until RETI (return from interrupt)

Upon executing the RETI the microcontroller returns to the place where it was interrupted. Get pop PC from stack

Interrupt Sources
Original 8051 has 6 sources of interrupts
Reset Timer 0 overflow Timer 1 overflow External Interrupt 0 External Interrupt 1 Serial Port events (buffer full, buffer empty, etc)

Enhanced version has 22 sources

More timers, programmable counter array, ADC, more external interrupts, another serial port (UART)

Interrupt Vectors
Each interrupt has a specific place in code memory where program execution (interrupt service routine) begins.
External Interrupt 0: Timer 0 overflow: External Interrupt 1: Timer 1 overflow: Serial : Timer 2 overflow(8052+) 0003h 000Bh 0013h 001Bh 0023h 002bh

Note: that there are only 8 memory locations between vectors.

ISRs and Main Program in 8051

SJMP ORG ljmp ORG ljmp ORG ljmp ORG ljmp ORG ljmp ORG
main: END

main 03H int0sr 0BH t0sr 13H int1sr 1BH t1sr 23H serialsr 30H

Interrupt Enable (IE) register

All interrupt are disabled after reset We can enable and disable them bye IE

Enabling and disabling an interrupt

by bit operation Recommended in the middle of program
SETB SETB SETB SETB SETB SETB EA ET0 ET1 EX0 EX1 ES SETB SETB SETB SETB SETB SETB IE.7 IE.1 IE.3 IE.0 IE.2 IE.4 ;Enable ;Enable ;Enable ;Enable ;Enable ;Enable All Timer0 ovrf Timer1 ovrf INT0 INT1 Serial port

by mov instruction Recommended in the first of program

MOV IE, #10010110B

Example
A 10khz square wave with 50% duty cycle
ORG LJMP ORG T0ISR:CPL RETI 0 MAIN 000BH P1.0
;Reset entry point ;Jump above interrupt ;Timer 0 interrupt vector ;Toggle port bit ;Return from ISR to Main program ;Main Program entry point ;Timer 0, mode 2 ;50 us delay ;Start timer ;Enable timer 0 interrupt ;Do nothing just wait

ORG 0030H MAIN: MOV TMOD,#02H MOV TH0,#-50 SETB TR0 MOV IE,#82H SJMP $ END

Example
Write a program using interrupts to simultaneously create 7 kHz and 500 Hz square waves on P1.7 and P1.6.
8051 P1.7
143s 71s

2ms

P1.6

1ms

ORG LJMP ORG LJMP ORG LJMP ORG MAIN: MOV MOV SETB SETB MOV MOV SJMP T0ISR: CPL RETI T1ISR: CLR MOV MOV SETB CPL RETI END

0 MAIN 000BH T0ISR 001BH T1ISR 0030H TMOD,#12H TH0,#-71 TR0 TF1 IE,#8AH IE,#8AH $ P1.7

Solution
143s 71s

8051 P1.7

2ms

P1.6

1ms

TR1 TH1,#HIGH(-1000) TL1,#LOW(-1000) TR1 P1.6

Timer ISR
Notice that
There is no need for a CLR TFx instruction in timer ISR 8051 clears the TF internally upon jumping to ISR

Notice that
We must reload timer in mode 1 There is no need on mode 2 (timer auto reload)

External interrupt type control

By low nibble of Timer control register TCON IE0 (IE1): External interrupt 0(1) edge flag.
set by CPU when external interrupt edge (H-to-L) is detected.
Does not affected by H-to-L while ISR is executed(no int on int) Cleared by CPU when RETI executed. does not latch low-level triggered interrupt

IT0 (IT1): interrupt 0 (1) type control bit.

Set/cleared by software IT=1 edge trigger IT=0 low-level trigger

(MSB) TF1 TR1 Timer 1

TF0 TR0 Timer0

IE1

IT1 IE0 for Interrupt

(LSB) IT0

External Interrupts
Level-triggered (default) INT0 (Pin 3.2) 0 1 2 IT0 IE0 (TCON.3) 0003

Edge-triggered

Level-triggered (default) INT0 (Pin 3.3) 0 1 2 IT1 IE1 (TCON.3) 0013

Edge-triggered

Example of external interuupt

ORG 0000H LJMP MAIN
;

;interrupt service routine (ISR) ;for hardware external interrupt INT1

;

WAIT:

ORG 0013H SETB P1.1 MOV R0,200 DJNZ R0,WAIT CLR P1.1 RETI

;main program for initialization

;

ORG 30H MAIN: SETB IT1 ;on negative edge of INT1 MOV IE,#10000100B WAIT2: SJMP WAIT2 END

Interrupt Priorities
What if two interrupt sources interrupt at the same time?

The interrupt with the highest PRIORITY gets serviced first.

All interrupts have a power on default priority order.
1. External interrupt 0 (INT0)
2. Timer interrupt0 (TF0) 3. External interrupt 1 (INT1) 4. Timer interrupt1 (TF1) 5. Serial communication (RI+TI)

Priority can also be set to high or low by IP reg.

Interrupt Priorities (IP) Register

----PT2 PS PT1 PX1 PT0 PX0

IP.7: reserved IP.6: reserved IP.5: timer 2 interrupt priority bit(8052 only) IP.4: serial port interrupt priority bit IP.3: timer 1 interrupt priority bit IP.2: external interrupt 1 priority bit IP.1: timer 0 interrupt priority bit IP.0: external interrupt 0 priority bit

Interrupt inside an interrupt

----PT2 PS PT1 PX1 PT0 PX0

A high-priority interrupt can interrupt a low-priority interrupy All interrupt are latched internally Low-priority interrupt wait until 8051 has finished servicing the high-priority interrupt

Serial Communication

Basics of serial communication

Parallel: expensive - short distance fast Serial :cheaper long (two different cities by modem)-slow

Basics of serial communication

Start and stop bits

When there is no transfer the signal is high Transmission begins with a start (low) bit LSB first Finally 1 stop bit (high) Data transfer rate (baud rate) is stated in bps bps: bit per second

How to communicate 8051 to PC

Connect TXD to RXD and RXD to TXD from pc to 8051 Use max232 to transform signal from TTL level to RS232 level

The baud rate of the 8051 must matched the baud rate of the pc
PC standard baud rate
2400-4800-9600-14400-19200-28800-33600-57600

Serial mode 1 is used Timer 1 is used The 8051 UART divides the machine cycle frequency by 32 Machine cycle is 1/12 XTAL frequency

We use timer1 in mode 2 (auto reload)

See example 10-1

RxD and TxD pins in the 8051

TxD pin 11 of the 8051 (P3.1) RxD pin 10 of the 8051 (P3.0)

SBUF register
MOV MOV MOV SBUF,#D SBUF,A A,SBUF
;load SBUF=44H, ASCII for D ;copy accumulator into SBUF ;copy SBUF into accumulator

MAX232

Serial port block diagram

Serial control (SCON) Register

SM0 SM1 SM2 REN TB8 RB8 TI RI

SM0 (SCON.7) : mode specifier

SM1 (SCON.6) : mode specifier

SM2 (SCON.5) : used for multi processor communication REN (SCON.4) : receive enable (by software enable/disable) TB8 (SCON.3) : transmit bit8 RB8 (SCON.2) : receive bit 8 TI (SCON.1) : transmit interrupt flag set by HW clear by SW RI (SCON.0) : receive interrupt flag set by HW clear by SW

Mode of operation
SM0 0 0 1 1 SM1 0 1 0 1 MODE 0 1 2 3 operation shift register 8 bit UART 9 bit UART 9 bit UART transmit rate fixed (xtal/12) variable (timer1) fixed (xtal/32 or xtal/64) variable (timer1)

Mode of operation
Mode 0 : Serial data enters and exits through RxD TxD outputs the shift clock. 8 bits are transmitted/received(LSB first) The baud rate is fixed a 1/12 the oscillator frequency.

Application

Port expansion

8051
TXD RXD

clk Shift register data

Mode of operation
Mode 1
Ten bits are transmitted (through TxD) or received (through RxD) A start bit (0), 8 data bits (LSB first), and a stop bit (1) On receive, the stop bit goes into RB8 in SCON the baud rate is determined by the Timer 1 overflow rate. Timer1 clock is 1/32 machine cycle (MC=1/12 XTAL) Timer clock can be programmed as 1/16 of machine cycle

Transmission is initiated by any instruction that uses SBUF as a destination register.

Mode of operation

Mode of operation
Mode 2 :

Eleven bits are transmitted (through TxD), received (through RxD) A start bit (0) 8 data bits (LSB first) A programmable 9th data bit and a stop bit (1) On transmit, the 9th bit (TB8) can be assigned 0 or 1. On receive, the 9the data bit goes into RB8 in SCON. the 9th can be parity bit The baud rate is programmable to 1/32 or 1/64 the oscillator frequency in Mode 2 by SMOD bit in PCON register Same as mode 2 But may have a variable baud rate generated from Timer 1.

Mode 3

What is SMOD
Bit 7 of PCON register If SMOD=1 double baud rate PCON is not bit addressable How to set SMOD Mov a, pcon Setb acc.7 Mov pcon,a

Serial example(1)
An example of sending a message. ;initialization MOV TMOD,#20H MOV TH1,#-12 MOV SCON,#52H ;begin to trnasmit SETB TR1 AGAIN1: MOV A,#'B' CALL TRANSS MOV A,#'A' CALL TRANSS MOV A,#'L' CALL TRANSS MOV A,#'E' CALL TRANSS SJMP AGAIN1 ;seial transmiting subroutine TRANSS: MOV SBUF,A AGAIN2: JNB TI,AGAIN2 CLR TI RET END

Serial example(2)
An example for serial port interrupt ORG 0000H LJMP MAIN ;jump to serial ISR ORG 23H LJMP ISR ;main program ORG 30H ;1-initializtion MAIN: MOV P0,#0FFH MOV TMOD,#20H ;ISR for reading from serial port ISR: PUSH ACC MOV TH1,#-13 JB TI,TRANSM MOV SCON,#50H MOV A,SBUF MOV IE,#90H MOV P2,A ;2-begin CLR RI SETB TR1 SJMP ISREND TRANSM: CLR TI AGAIN: MOV A,P0 ISREND: POP ACC MOV P1,A RETI SJMP AGAIN END ;

an example for serial port interrupt ;for transmitting ORG 0000H LJMP MAIN ;jump to serial ISR ORG 23H LJMP ISR ;main program ORG 30H ;initializtion MAIN: MOV P0,#0FFH ;ISR for receive from serial to p0 MOV TMOD,#20H ;transmitting to serial from p1 MOV TH1,#-13 ISR: JB TI,TRANSM MOV SCON,#50H MOV A,SBUF mov P0,A MOV IE,#90H CLR RI ;2-begin RETI SETB TR1 TRANSM: MOV A,P1 AGAIN: SJMP AGAIN MOV SBUF,A CLR TI RETI END

Serial example(3)

Power control register

Power control
A standard for applications where power consumption is critical two power reducing modes
Idle Power down

Idle mode
An instruction that sets PCON.0 causes Idle mode
Last instruction executed before going into the Idle mode the internal CPU clock is gated off Interrupt, Timer, and Serial Port functions act normally. All of registers , ports and internal RAM maintain their data during Idle ALE and PSEN hold at logic high levels will cause PCON.0 to be cleared by HW (terminate Idle mode) then execute ISR with RETI return and execute next instruction after Idle instruction.

Any interrupt

RST signal clears the IDL bit directly

Power-Down Mode
An instruction that sets PCON.1 causes power dowm mode Last instruction executed before going into the power down mode the on-chip oscillator is stopped. all functions are stopped,the contents of the on-chip RAM and Special Function Registers are maintained. The ALE and PSEN output are held low The reset that terminates Power Down

Power control example

Org 0000h Ljmp main Org 0003h Orl pcon,#02h Reti Org 0030h Main: Orl pcon,#01h end

;power down mode

;Idle mode

Thank You