Scribd
Upload
59 views26 pages

William Stallings Computer Organization and Architecture

aria2c -x3 http://www.pedraorc.com.br/anhanguera/SO_2013/Aula_01_SO.pdf; aria2c -x3 http://www.pedraorc.com.br/anhanguera/SO_2013/Aula_02_SO.pdf; aria2c -x3 http://www.pedraorc.com.br/anhanguera/SO_2013/Aula_03_SO.pdf; aria2c -x3 http://www.pedraorc.com.br/anhanguera/SO_2013/Aula_04_SO.pdf; aria2c -x3 http://www.pedraorc.com.br/anhanguera/SO_2013/Aula_05_SO.pdf; aria2c -x3 http://www.pedraorc.com.br/anhanguera/SO_2013/Aula_06_SO.pdf; aria2c -x3 http://www.pedraorc.com.br/anhanguera/SO_2013/Aula_07_SO.pdf; aria2c -x3 http://www.pedraorc.com.br/anhanguera/SO_2013/Aula_08_SO.pdf; aria2c -x3 http://www.pedraorc.com.br/anhanguera/SO_2013/Aula_09_SO.pdf; aria2c -x3 http://www.pedraorc.com.br/anhanguera/SO_2013/Aula_10_SO.pdf; aria2c -x3 http://www.pedraorc.com.br/anhanguera/SO_2013/Aula_11_SO.pdf; aria2c -x3 http://www.pedraorc.com.br/anhanguera/SO_2013/Aula_12_SO.pdf; aria2c -x3 http://www.pedraorc.com.br/anhanguera/SO_2013/Aula_13_SO.pdf; aria2c -x3 http://www.pedraorc.com.br/anhanguera/SO_2013/Aula_14_SO.pdf; aria2c -x3 http://www.pedraorc.com.br/anhanguera/SO_2013/Aula_15_SO.pdf; aria2c -x3 http://www.pedraorc.com.br/anhanguera/SO_2013/Aula_16_SO.pdf

Uploaded by

reinaldoopus
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPT, PDF, TXT or read online on Scribd
59 views26 pages

William Stallings Computer Organization and Architecture

aria2c -x3 http://www.pedraorc.com.br/anhanguera/SO_2013/Aula_01_SO.pdf; aria2c -x3 http://www.pedraorc.com.br/anhanguera/SO_2013/Aula_02_SO.pdf; aria2c -x3 http://www.pedraorc.com.br/anhanguera/SO_2013/Aula_03_SO.pdf; aria2c -x3 http://www.pedraorc.com.br/anhanguera/SO_2013/Aula_04_SO.pdf; aria2c -x3 http://www.pedraorc.com.br/anhanguera/SO_2013/Aula_05_SO.pdf; aria2c -x3 http://www.pedraorc.com.br/anhanguera/SO_2013/Aula_06_SO.pdf; aria2c -x3 http://www.pedraorc.com.br/anhanguera/SO_2013/Aula_07_SO.pdf; aria2c -x3 http://www.pedraorc.com.br/anhanguera/SO_2013/Aula_08_SO.pdf; aria2c -x3 http://www.pedraorc.com.br/anhanguera/SO_2013/Aula_09_SO.pdf; aria2c -x3 http://www.pedraorc.com.br/anhanguera/SO_2013/Aula_10_SO.pdf; aria2c -x3 http://www.pedraorc.com.br/anhanguera/SO_2013/Aula_11_SO.pdf; aria2c -x3 http://www.pedraorc.com.br/anhanguera/SO_2013/Aula_12_SO.pdf; aria2c -x3 http://www.pedraorc.com.br/anhanguera/SO_2013/Aula_13_SO.pdf; aria2c -x3 http://www.pedraorc.com.br/anhanguera/SO_2013/Aula_14_SO.pdf; aria2c -x3 http://www.pedraorc.com.br/anhanguera/SO_2013/Aula_15_SO.pdf; aria2c -x3 http://www.pedraorc.com.br/anhanguera/SO_2013/Aula_16_SO.pdf

Uploaded by

reinaldoopus
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPT, PDF, TXT or read online on Scribd
You are on page 1/ 26

William Stallings Computer Organization and Architecture

Chapter 2 Computer Evolution and Performance

ENIAC - background
Electronic Numerical Integrator And Computer Eckert and Mauchly University of Pennsylvania Trajectory tables for weapons Started 1943 Finished 1946
Too late for war effort

Used until 1955

ENIAC - details
Decimal (not binary) 20 accumulators of 10 digits Programmed manually by switches 18,000 vacuum tubes 30 tons 15,000 square feet 140 kW power consumption 5,000 additions per second

von Neumann/Turing
Stored Program concept Main memory storing programs and data ALU operating on binary data Control unit interpreting instructions from memory and executing Input and output equipment operated by control unit Princeton Institute for Advanced Studies
IAS

Completed 1952

Structure of von Nuemann machine

Arithmetic and Logic Unit

Input Output Equipment

Main Memory

Program Control Unit

IAS - details
1000 x 40 bit words
Binary number 2 x 20 bit instructions

Set of registers (storage in CPU)


Memory Buffer Register Memory Address Register Instruction Register Instruction Buffer Register Program Counter Accumulator Multiplier Quotient

Structure of IAS - detail


Central Processing Unit Arithmetic and Logic Unit Accumulator MQ

Arithmetic & Logic Circuits MBR Instructions Main & Data Memory IBR IR PC MAR

Input Output Equipment

Control Circuits
Address

Program Control Unit

Commercial Computers
1947 - Eckert-Mauchly Computer Corporation UNIVAC I (Universal Automatic Computer) US Bureau of Census 1950 calculations Became part of Sperry-Rand Corporation Late 1950s - UNIVAC II
Faster More memory

IBM
Punched-card processing equipment 1953 - the 701
IBMs first stored program computer Scientific calculations

1955 - the 702


Business applications

Lead to 700/7000 series

Transistors
Replaced vacuum tubes Smaller Cheaper Less heat dissipation Solid State device Made from Silicon (Sand) Invented 1947 at Bell Labs William Shockley et al.

Transistor Based Computers


Second generation machines NCR & RCA produced small transistor machines IBM 7000 DEC - 1957
Produced PDP-1

Microelectronics
Literally - small electronics A computer is made up of gates, memory cells and interconnections These can be manufactured on a semiconductor e.g. silicon wafer

Generations of Computer
Vacuum tube - 1946-1957 Transistor - 1958-1964 Small scale integration - 1965 on
Up to 100 devices on a chip

Medium scale integration - to 1971


100-3,000 devices on a chip

Large scale integration - 1971-1977


3,000 - 100,000 devices on a chip

Very large scale integration - 1978 to date


100,000 - 100,000,000 devices on a chip

Ultra large scale integration


Over 100,000,000 devices on a chip

Moores Law
Increased density of components on chip Gordon Moore - cofounder of Intel Number of transistors on a chip will double every year Since 1970s development has slowed a little
Number of transistors doubles every 18 months

Cost of a chip has remained almost unchanged Higher packing density means shorter electrical paths, giving higher performance Smaller size gives increased flexibility Reduced power and cooling requirements Fewer interconnections increases reliability

Growth in CPU Transistor Count

IBM 360 series


1964 Replaced (& not compatible with) 7000 series First planned family of computers
Similar or identical instruction sets Similar or identical O/S Increasing speed Increasing number of I/O ports (i.e. more terminals) Increased memory size Increased cost

Multiplexed switch structure

DEC PDP-8
1964 First minicomputer (after miniskirt!) Did not need air conditioned room Small enough to sit on a lab bench $16,000
$100k+ for IBM 360

Embedded applications & OEM BUS STRUCTURE

DEC - PDP-8 Bus Structure

Console Controller

CPU

Main Memory

I/O Module

I/O Module

OMNIBUS

Semiconductor Memory
1970 Fairchild Size of a single core
i.e. 1 bit of magnetic core storage

Holds 256 bits Non-destructive read Much faster than core Capacity approximately doubles each year

Intel
1971 - 4004
First microprocessor All CPU components on a single chip 4 bit

Followed in 1972 by 8008


8 bit Both designed for specific applications

1974 - 8080
Intels first general purpose microprocessor

Speeding it up
Pipelining On board cache On board L1 & L2 cache Branch prediction Data flow analysis Speculative execution

Performance Mismatch
Processor speed increased Memory capacity increased Memory speed lags behind processor speed

DRAM and Processor Characteristics

Trends in DRAM use

Solutions
Increase number of bits retrieved at one time
Make DRAM wider rather than deeper

Change DRAM interface


Cache

Reduce frequency of memory access


More complex cache and cache on chip

Increase interconnection bandwidth


High speed buses Hierarchy of buses

Internet Resources
http://www.intel.com/
Search for the Intel Museum

http://www.ibm.com http://www.dec.com Charles Babbage Institute PowerPC Intel Developer Home

You might also like