ASIC Design Classification Details
ASIC Design Classification Details
The earliest ICs were based on the bipolar transistor logic They are classified as Transistor Transistor Logic ICs (TTL) or as Emitter Coupled Logic (ECL) ICs based on the circuit configuration. The invention of Metal Oxide Silicon (MOS) transistors in 1970 helped to reduce the power consumption and cost of Integrated Circuits.
In 1980s-Aluminium gates of the MOS transistors are replaced by polysilicon. This enables to build NMOS and PMOS on the same IC. The introduction of CMOS (Complementary Metal Oxide Silicon) technology in the 1980s revolutionized the Integrated Circuits. The major advantages of the CMOS technology are the reduced power consumption and high level of integration.
The major advantages of using the ASICs are Miniaturization: The usage of custom ICs will reduce the size of the end product. An ASIC may replace the functions of a number of PCBs in the system, resulting in size reduction. Lesser inventory: The reduced number of components per system reduces the inventory. This in turn reduces the cash out flow. Reduced cost and maintenance: Lesser components lead to fewer failures and lesser system down time. Maintenance will be easy. All it may need would be the replacement of a single PCB. Lower power consumption: Lesser number of components in a system reduces the power consumption. Most of the ASICs are based on the low power CMOS technology. Proprietary nature: Full protection from copycats. Your R&D investments are well protected. Performance: More and more functions can be integrated to the ASIC, without increasing the size or cost or power consumption of the product.
The major Risks of using the ASICs are Higher cost: ASIC will be always expensive than the standard components. We will have to invest more time and money for the design and development phase. The selection of the ASIC technology is very important. Time to market: The product lead time will be more for an ASIC based system. The market research team should define the requirement of the end product well in advance. Last minute changes in the specification will result in delayed market entry and revenue loss. The right product should be introduced in to the market at the right time. First time success: The ASIC design should be properly simulated and thoroughly tested to insure the first time success. Any failure will affect the time to market and resulting huge loss in revenue.
An ASIC should be designed only if a functionally equivalent standard, off the shelf. component is not available from the market. For example no engineer will design a memory ASIC to be used in his system. Instead he will use the standard components available from the market. Any IC that can be purchased by quoting a part number from the market is called a standard IC.
By this definition we can treat all RAMS, ROMS, Microprocessors, Counters, Flip-flops, Logic gates as standard ICs. A standard IC will be always listed in the data manual An IC developed for a hand held game unit. An IC used in a camera, an IC used in the smart card or the like can be classified as ASIC products. The ASIC part number will not be listed in the general Data Manual. You will not be able to buy this product from the open market against the part number.
TYPES OF ASICs
Full-custom ASIC Semi-custom ASIC Cell-base ASIC Gate-array-based ASIC Programmable ASIC Programmable Logic Device (PLD) Field-programmable Gate array (FPGA)
Standard-Cell-Based ASIC
Cell-based IC (CBIC-sea-bick) uses predesigned logic cells known as standard cells Designer only defines the placement of the standard cells and the interconnection. Using a predesigned standard-cell library reduced design risk and time Each standard cell can be optimized individually
Standard cell library includes Sample logic gates. Functions like XOR,FF,ADDER, and COMPARATORS,ALU. Megafunctions like micropocessor cores,RAM core The mega function blocks are sometime known as fixed blocks.
By selecting the CBIC technology, the designer saves a lot of design and characterization time compared to the Full Custom technology. To customize the chip, the designer has to define the floor planning and interconnects. Like full custom design, since the placements of the cells are done at the design phase, the fabrication of the ASIC has to go through all the mask process