2.micro Controller 8086 Instruction Set
2.micro Controller 8086 Instruction Set
2.micro Controller 8086 Instruction Set
By
Software
The sequence of commands used to tell a microcomputer what to do is called a program Each command in a program is called an instruction 8086 understands and performs operations for 117 basic instructions A program written in machine language is referred to as machine code In 8088 assembly language, each of the operations is described by alphanumeric symbols instead of 0-1s.
ADD AX, BX
(Opcode) (Destination operand) (Source operand )
Instructions
LABEL: INSTRUCTION
Address identifier
; COMMENT
Does not generate any machine code
Ex.
; copy BX into AX
There is a one-to-one relationship between assembly and machine language instructions A compiled machine code implementation of a program written in a high-level language results in inefficient code
Destination
Memory Accumulator Register Register Memory Register Memory
Source
Accumulator Memory Register Memory Register Immediate Immediate
NO MOV
Memory Immediate Segment Register Memory Segment Register Segment Register
Seg reg
Seg reg Reg 16 Memory
Reg 16
Mem 16 Seg reg Seg reg
EX:
MOV AL, BL
Destination
Source
NO XCHG
LDS
LDS Reg16,MEM32
None
LES
LES Reg16,MEM32
(MEM32) (Reg16)
(Mem32+2) (DS)
None
Example: Assume (DS) = 0300H, (BX)=0100H, and (AL)=0DH XLAT replaces contents of AL by contents of memory location with PA=(DS)0 +(BX) +(AL) = 03000H + 0100H + 0DH = 0310DH Thus (0310DH) (AL)
9
Meaning
Addition
Format
ADD D,S
Operation
(S)+(D) (D) carry (CF) (S)+(D)+(CF) carry (D)+1 (D) (CF) (D)
Flags affected
ALL
ADC
ADC D,S
ALL
INC
INC D
ALL Except CF
AF,CF
AAA
AAA
Converts AL to unpacked decimal digits. (Refer text) Adjust AL for decimal Packed BCD
DAA
DAA
ALL
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Examples:
Ex.1 ADD AX,2 ADC AX,2
Ex.2 INC BX INC WORD PTR [BX] Ex.3 ASCII CODE 0-9 = 30-39h MOV AX,38H ADD AL,39H AAA ADD AX,3030H ; (ASCII code for number 8) ; (ASCII code for number 9) AL=71h ; used for addition AH=01, AL=07 ; answer to ASCII 0107 AX=3137
73 + 29 -------9C +6 --------A2 +60 ----------102
Ex.4 AL contains 73 (packed BCD) BL contains 29 (packed BCD) ADD AL, BL DAA
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SUB
SBB
Subtract
Subtract with borrow Decrement by one Negate Decimal adjust after subtraction ASCII adjust after subtraction
SUB D,S
SBB D,S
(D) (CF)
(D)
All
All
(D) - 1
(D)
Convert the result in AL to packed decimal format (AL) difference (AH) dec by 1 if borrow
All
AAS
AAS
CY,AC
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Examples: DAS
MOV BL, 46H MOV AL, 75H SUB AL,BL DAS
Dividend
Quotient: Remainder
AX
AL : AH
Dword/Word
DX:AX
Register or Memory
AX : DX
Qword/Dword
EDX: EAX
Register or Memory
EAX : EDX 14
15
Ex1: Assume that each instruction starts from these values: AL = 85H, BL = 35H, AH = 0H 1. MUL BL AL . BL = 85H * 35H = 1B89H AX = 1B89H 2. IMUL BL AL . BL = 2S AL * BL = 2S (85H) * 35H = 7BH * 35H = 1977H 2s comp E689H AX. AH 0085 H 3. DIV BL AX = = 02 (85-02*35=1B) 1B 35 H BL AH AL AX 0085 H 4. IDIV BL = = 1B 02 BL 35 H AL
02
16
Ex2:
15 R
02 Q
AH
15
AL
FE
00 F 3H AX 4. DIV BL = = 01(F3-1*91=62) 91 H BL
AH 62 R
AL 01 Q
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DX 8713
AX B000
DX AX
06FE
B000
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Ex4:
AX 1250 H 1250 H POS POS 1250 H 1. IDIV BL = = = = = BL NEG 2' sNEG 2' s(90 H ) 70 H 90 H
= 29H (Q) (1250 29 * 70) = 60H (REM) 29H ( POS) 2S (29H) = D7H
R 60H
Q D7H
R 50H AH
Q 20H AL
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Logical Instructions
Mnemonic AND OR Meaning Logical AND Logical Inclusive OR Logical Exclusive OR Format AND D,S OR D,S Operation (S) (D) (D) (S)+(D) (D) (S) + (D)(D) _ (D) (D) Flags Affected OF, SF, ZF, PF, CF AF undefined OF, SF, ZF, PF, CF AF undefined OF, SF, ZF, PF, CF AF undefined None
XOR
XOR D,S
NOT
LOGICAL NOT
NOT D
Register Memory
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Uses any addressing mode except memory-to-memory and segment registers Especially used in clearing certain bits (masking) xxxx xxxx AND 0000 1111 = 0000 xxxx (clear the first four bits) Examples: AND BL, 0FH AND AL, [345H] OR Used in setting certain bits xxxx xxxx OR 0000 1111 = xxxx 1111 (Set the lower four bits)
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XOR
Used in Inverting bits xxxx xxxx XOR 0000 1111 = xxxxxxxx
-Example: Clear bits 0 and 1, set bits 6 and 7, invert bit 5 of register CL: AND CL, OFCH ; OR CL, 0C0H ; XOR CL, 020H ; 1111 1100B 1100 0000B 0010 0000B
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An arithmetic shift fills the newly created bit position with a copy of the numbers sign bit:
CF
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Shift Instructions
Mnemo -nic
SAL/ SHL
Meaning
Format
Operation
Shift the (D) left by the number of bit positions equal to count and fill the vacated bits positions on the right with zeros
Flags Affected
CF,PF,SF,ZF AF undefined OF undefined if count 1
SHR
SHR D, Count
Shift the (D) right by the number of bit positions equal to count and fill the vacated bits positions on the left with zeros
Shift the (D) right by the number of bit positions equal to count and fill the vacated bits positions on the left with the original most significant bit
SAR
SAR D, Count
Allowed operands
Destination Register Register Memory Memory Count 1 CL 1 CL
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SHL Instruction
The SHL (shift left) instruction performs a logical left shift on the destination operand, filling the lowest bit with 0.
0
CF
Operand types: SHL reg,imm8 SHL mem,imm8 SHL reg,CL SHL mem,CL
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Fast Multiplication
Shifting left 1 bit multiplies a number by 2
mov dl,5
shl dl,1
Before: After:
00000101 00001010
=5 = 10
; DL = 20
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Ex. ; Multiply AX by 10
SHL AX, 1 MOV BX, AX MOV CL,2 SHL AX,CL ADD AX, BX
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SHR Instruction
The SHR (shift right) instruction performs a logical right shift on the destination operand. The highest bit position is filled with a zero.
0
CF
SAR Instruction
SAR (shift arithmetic right) performs a right arithmetic shift on the destination operand.
CF
Rotate Instructions
Mnem -onic ROL Meaning Rotate Left Format ROL D,Count Operation Flags Affected Rotate the (D) left by the CF number of bit positions equal OF undefined to Count. Each bit shifted out if count 1 from the left most bit goes back into the rightmost bit position. CF OF undefined if count 1
ROR
Rotate Right
ROR D,Count Rotate the (D) right by the number of bit positions equal to Count. Each bit shifted out from the rightmost bit goes back into the leftmost bit position. RCL D,Count Same as ROL except carry is attached to (D) for rotation.
RCL
RCR
RCR D,Count Same as ROR except carry is attached to (D) for rotation.
ROL Instruction
ROL (rotate) shifts each bit to the left The highest bit is copied into both the Carry flag and into the lowest bit No bits are lost
CF
; AL = 11100001b
; DL = F3h
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ROR Instruction
ROR (rotate right) shifts each bit to the right The lowest bit is copied into both the Carry flag and into the highest bit No bits are lost
CF
; AL = 01111000b
; DL = F3h
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RCL Instruction
RCL (rotate carry left) shifts each bit to the left Copies the Carry flag to the least significant bit Copies the most significant bit to the Carry flag
CF
; ; ; ;
RCR Instruction
RCR (rotate carry right) shifts each bit to the right Copies the Carry flag to the most significant bit Copies the least significant bit to the Carry flag
CF
Rotate Instructions
Destination Register Register Memory Memory Count 1 CL 1 CL
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Clear Carry Flag (CF) 0 Set Carry Flag Complement Carry Flag Clear Direction Flag Set Direction Flag Clear Interrupt Flag Set Interrupt Flag (CF) 1 (CF) (CF)l (DF) 0 SI & DI will be auto incremented while string instructions are executed. (DF) 1 SI & DI will be auto decremented while string instructions are executed. (IF) 0 (IF) 1
CF CF CF
DF
STD
DF IF IF
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CLI STI
Allowed Operands (D) = (S) (D) > (S) ; ZF=0 ; ZF=0, CF=0
Destination Register Register Memory Register Memory Accumulator Source Register Memory Register Immediate Immediate Immediate 40
; ZF=0, CF=1
String?
An array of bytes or words located in memory Supported String Operations Copy (move, load) Search (scan) Store Compare
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String Instructions
Instruction prefixes
Prefix
Used with
Meaning
REP
MOVS STOS
Repeat while not end of string CX 0 Repeat while not end of string and strings are equal. CX 0 and ZF = 1
REPE/REPZ
CMPS SCAS
REPNE/REP NZ
CMPS SCAS
Repeat while not end of string and strings are not equal. CX 43 0 and ZF = 0
Instructions
MnemoNic MOVS meaning format Operation Flags effect -ed
MOVSB/ ((ES)0+(DI)) ((DS)0+(SI)) none MOVSW (SI) (SI) 1 or 2 (DI) (DI) 1 or 2 CMPSB/ Set flags as per CMPSW ((DS)0+(SI)) - ((ES)0+(DI)) (SI) (SI) 1 or 2 (DI) (DI) 1 or 2 All status flags
CMPS
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MnemoNic SCAS
Operation Set flags as per (AL or AX) - ((ES)0+(DI)) (DI) (DI) 1 or 2 (AL or AX) ((DS)0+(SI)) (SI) (SI) 1 or 2
LODS
STOS
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Conditional jumps
Unconditional jump
Iteration instructions
CALL instructions
Return instructions
46
Next instruction
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A subroutine is a special segment of program that can be called for execution from any point in a program. An assembly language subroutine is also referred to as a procedure. Whenever we need the subroutine, a single instruction is inserted into the main body of the program to call subroutine. To branch a subroutine the value in the IP or CS and IP must be modified. After execution, we want to return the control to the instruction that immediately follows the one called the subroutine i.e., the original value of IP or CS and IP must be preserved. Execution of the instruction causes the contents of IP to be saved on the stack. (this time (SP) (SP) -2 ) A new 16-bit (near-proc, mem16, reg16 i.e., Intra Segment) value which is specified by the instructions operand is loaded into IP. Examples: CALL 1234H
CALL BX CALL [BX]
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Inter Segment At starting CS and IP placed in a stack. New values are loaded in to CS and IP given by the operand. After execution original CS, IP values placed as it is. Far-proc Memptr32 These two words (32 bits) are loaded directly into IP and CS with execution at CALL instruction.
First 16 IP
Next 16 CS
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Format
Operation
Flags Affected
Subroutine CALL operand Execution continues from none call the address of the subroutine specified by the operand. Information required to return back to the main program such as IP and CS are saved on the stack.
Operand Near-proc
Far proc
Memptr 16 Regptr 16 Memptr 32
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RETURN
Every subroutine must end by executing an instruction that returns control to the main program. This is the return (RET) instruction. By execution the value of IP or IP and CS that were saved in the stack to be returned back to their corresponding regs. (this time (SP) (SP)+2 ) Mnem Meaning -onic RET Return Format Operation Flags Affected to the main None by restoring IP for far-proc). If is present, it is the contents of
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Loop Instructions
These instructions are used to repeat a set of instructions several times. Format: LOOP Short-Label Operation: (CX) (CX)-1 Jump is initialized to location defined by short label if CX0. otherwise, execute next sequential instruction. Instruction LOOP works w.r.t contents of CX. CX must be preloaded with a count that represents the number of times the loop is to be repeat. Whenever the loop is executed, contents at CX are first decremented then checked to determine if they are equal to zero. If CX=0, loop is complete and the instruction following loop is executed. If CX 0, content return to the instruction at the label specified in the loop instruction.
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It is a 2 byte instruction.
Used for backward jump only. Maximum distance for backward jump is only 128 bytes. LOOP AGAIN is almost same as: DEC CX JNZ AGAIN
Operation (CX) (CX) 1 Jump to location given by short-label if CX 0 (CX) (CX) 1 Jump to location given by short-label if CX 0 and ZF=1 (CX) (CX) 1 Jump to location given by short-label if CX 0 and ZF=0
LOOPE/ LOOPZ
LOOPE/LOOPZ short-label
LOOPNE/ Loop while LOOPNZ not equal/ loop while not zero
LOOPNE/LOOPNZ short-label
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JMP AA
Part 2
Part 3 AA XXXX
Next instruction
Intra segment Jump Inter segment Jump (Jump within the segment) (Jump to a different segment)
Is limited to the address with in the current segment. It is achieved by modifying value in IP Operands
Short label Near label Far label Memptr16 Regptr16 memptr32
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Permits jumps from one code segment to another. It is achieved by modifying CS and IP
Conditional Jump
Part 1
Jcc AA Part 2 NO
Conditional Jump
condition
YES
XXXX
Skipped part
Part 3
AA XXXX Next instruction
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Conditional Jump instructions in 8086 are just 2 bytes long. 1-byte opcode followed by 1-byte signed displacement (range of 128 to +127).
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Mnemonic : Meaning :
Format :
Operation :
Jcc operand
If condition is true jump to the address specified by operand. Otherwise the next instruction is executed.
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TYPES Mnemonic JA JB JB JBE meaning Above Above or Equal Below Below or Equal condition CF=0 and ZF=0 CF=0 CF=1 CF=1 or ZF=1
JC
JCXZ JE JG JGE
Carry
CX register is Zero Equal Greater Greater or Equal
CF=1
(CF or ZF)=0 ZF=1 ZF=0 and SF=OF SF=OF
JL
Less
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Mnemonic
meaning
condition
JLE
JNA JNAE JNB JNBE
Less or Equal
Not Above Not Above nor Equal Not Below Not Below nor Equal
JNC
JNE JNG JNGE JNL
Not Carry
Not Equal Not Greater
CF = 0
ZF = 0 ((SF XOR OF) or ZF)=1
Mnemonic
JNLE JNO JNP
meaning
Not Less nor Equal Not Overflow Not Parity OF = 0 PF = 0
condition
ZF = 0 and SF = OF
JNZ
JNS JO JP
Not Zero
Not Sign Overflow Parity
ZF = 0
SF = 0 OF = 1 PF = 1
JPE
JPO JS JZ
Parity Even
Parity Odd Sign Zero
PF = 1
PF = 0 SF = 1 ZF = 1
62
JNP JO JNO
r8 ;Jump if No Parity (Parity is odd) r8 ;Jump if Overflow flag set to 1 (result is wrong) r8 ;Jump if No Overflow (result is correct)
63
JC r8 ;JB (Jump if below) and JNAE (Jump if Not Above or Equal) also mean same.
JNC r8 ;JAE (Jump if Above or Equal) and JNB (Jump if Not Above) also mean same. JZ, JNZ, JC and JNC used after arithmetic operation JE, JNE, JB, JNAE, JAE and JNB are used after a compare operation.
JP r8 ; JPE (Jump if Parity Even) also means same. JNP r8 ; JPO (Jump if Parity Odd) also means same.
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Ex. for forward jump (Only examples for JE given) CMP SI, DI
JE SAME
Should be <=127 bytes ADD CX, DX ;Executed if Z = 0
:
:
;Executed if Z = 1
(if SI = DI)
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:
: CMP SI, DI JE BACK ADD CX, DX
(if SI = DI)
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Requirement CMP SI, DI JE SAME What if >127 bytes ADD CX, DX : : SAME: SUB BX, AX
Then do this! CMP SI, DI JNE NEXT JMP SAME NEXT: ADD CX, DX : : SAME: SUB BX, AX
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Above and Below used for comparing Unsigned nos. Greater than and less than used with signed numbers. All Intel microprocessors use this convention. 95H is above 65H 95H is less than 65H Unsigned comparison - True Signed comparison True 95H is negative, 65H is positive Unsigned comparison - True
Signed comparison -
True
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JBE or JNA
Jump if Cy = 1 OR Z= 1
No Jump if Cy = 0 AND Z = 0
Below OR Equal
Surely Above
JBE BX_BE
JNBE or JA
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71
72
No Jump if S = 0 AND V = 0 (surely positive) OR (S = 1 AND V = 1) (wrong answer negative!) i.e. S XOR V = 0
When S = 0, result can be 0
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No Jump if S = 1 AND V = 0 (surely negative) OR (S = 0 AND V = 1) (wrong answer positive!) i.e. S XOR V = 1
When S = 1, result cannot be 0
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Near Jump
Near Jump Direct Jump (common) Short Jump Long Jump Indirect Jump (uncommon)
2 bytes
EB r8 range + 27
3 bytes
E9 r16 range +215
3 Near Jump and 2 Far Jump instructions have the same mnemonic JMP but different opcodes
75
Short Jump
2 byte (EB r8) instruction Range: -128 to +127 bytes Backward jump: Assembler knows the quantum of jump. Generates Short Jump code if <=128 bytes is the required jump Generates code for Long Jump if >128 bytes is the required jump
Forward jump: Assembler doesnt know jump quantum in pass 1. Assembler reserves 3 bytes for the forward jump instruction. If jump distance turns out to be >128 bytes, the instruction is coded as E9 r16 (E9H = Long jump code). If jump distance becomes <=128 bytes, the instruction is coded as EB r8 followed by code for NOP (E8H = Short jump code).
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77
Long Jump
3-byte (E9 r16) instruction Range: -32768 to +32767 bytes
CS:0000H
Long Jump can handle it as jump quantum is <=32767 CS:8000H JMP FRWD : : FRWD = CS:FFFFH
78
BKWD = CS:0000H
CS:8000H JMP BKWD : : CS:FFFFH
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CS:0000H
: : JMP FRWD : : Jump distance =FFE0H. Too very long forward jump
80
CS:0000H
: : : : JMP BKWD Jump distance =FFE0H. Too very long backward jump
BKWD= CS:0010H
CS:FFF0H CS:FFFFH
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Far Jump
Far Jump
Direct Jump (common) 5 bytes EA,2 byte offset, 2 byte segment Range: anywhere
3 Near Jump and 2 Far Jump instructions have the same mnemonic JMP but different opcodes
83
84
Instruction length depends on the way jump location is specified It can be a minimum of 2 bytes
85
Also called Far Indirect Jump It is not commonly used Instruction length is a minimum of 2 bytes. It depends on the way jump location is specified Ex. JMP DWORD PTR 2000H[BX] BX 1234H Branches to ABCDH:5678H DS:3234H DS:3236H 5678H ABCDH It is a 4-byte instruction
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