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8051 Microcontroller Interrupts Programming in Assembly

This document discusses interrupts in the 8051 microcontroller. It covers the differences between interrupts and polling, interrupt service routines, the six interrupts available in the 8051 including reset, timer, external hardware, and serial communication interrupts. It describes the interrupt enable register for enabling and disabling interrupts. Examples are provided for programming timer interrupts to generate square waves and external hardware interrupts to respond to switch presses and pulse inputs.

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75 views20 pages

8051 Microcontroller Interrupts Programming in Assembly

This document discusses interrupts in the 8051 microcontroller. It covers the differences between interrupts and polling, interrupt service routines, the six interrupts available in the 8051 including reset, timer, external hardware, and serial communication interrupts. It describes the interrupt enable register for enabling and disabling interrupts. Examples are provided for programming timer interrupts to generate square waves and external hardware interrupts to respond to switch presses and pulse inputs.

Uploaded by

malhiavtarsingh
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPT, PDF, TXT or read online on Scribd
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8051 Microcontroller Interrupts Programming In Assembly

8051 INTERRUPTS
Interrupts vs. polling
In Interrupts, whenever any device needs its service, the device notifies the microcontroller by sending it an interrupt signal
In Polling, the microcontroller continuously monitors the status of the given device; when the status condition is met, it performs the service. Interrupts win if processor has other work to do and event response time is not critical Polling can be better if processor has to respond to an event ASAP
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8051 INTERRUPTS
Interrupt service routine
An Interrupt service routine (ISR) is a software routine that hardware invokes in response to an interrupt. ISRs examine an interrupt and determine how to handle it. ISRs handle the interrupt, and then return a logical interrupt value. The program which is associated with the interrupt is called the interrupt service routine (ISR) or interrupt handler.
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8051 INTERRUPTS

Table 111

Interrupt Vector Table for the 8051


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8051 INTERRUPTS
Six interrupts in the 8051
1 reset interrupt, when the reset pin is activated, the 8051 jumps to address location 0000 2 timer interrupts 2 external hardware interrupts pin 12 (P3.2) and 13 (P3.3) in port 3 are for the external hardware interrupts 1 serial communication interrupt that belongs to both receive and transmit a limited number of bytes is set aside for each interrupt

8051 INTERRUPTS

Redirecting the 8051 from the Interrupt Vector Table at Power-up


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8051 INTERRUPTS

IE (Interrupt Enable) Register

8051 INTERRUPTS
Enabling and disabling an interrupt
upon reset all interrupts are disabled interrupts must be enabled by software IE register (interrupt enable) is responsible for enabling and disabling the interrupts IE is a bit-addressable register

8051 INTERRUPTS
Steps in enabling an interrupt
1. EA must be set to 1 2. set the relevant bits in IE register to high
EA = 0, no interrupt will be responded to, even if the relevant bit in the IE register is high

Example Show the instructions to (a) enable the serial interrupt, Timer 0 interrupt, and external hardware interrupt 1 (EX1), and (b) disable (mask) the Timer 0 interrupt, then (c) show how to disable all the interrupts with a single instruction.

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PROGRAMMING TIMER INTERRUPTS


Roll-over timer flag and interrupt

if the timer interrupt is enabled, whenever TF=1, the microcontroller is interrupted in whatever it is doing, and jumps to the interrupt vector table to service the ISR In this way, the microcontroller can do other things until it is notified that the timer has rolled over

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ExampleWrite a program using interrupts to simultaneously create 7 kHz and 500 Hz square waves on P1.7 and P1.6.
8051
143s 71s

P1.7

2ms

P1.6

1ms

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Solution
ORG LJMP ORG LJMP ORG LJMP ORG MAIN: MOV MOV SETB SETB MOV MOV SJMP T0ISR: CPL RETI T1ISR: CLR MOV MOV SETB CPL RETI END 0 MAIN 000BH T0ISR 001BH T1ISR 0030H TMOD,#12H TH0,#-71 TR0 TF1 IE,#8AH IE,#8AH $ P1.7 TR1 TH1,#HIGH(-1000) TL1,#LOW(-1000) TR1 P1.6
8051 P1.7
143s 71s

2ms

P1.6

1ms

PROGRAMMING EXTERNAL HARDWARE INTERRUPTS

External interrupts INT0 and INT1

Activation of INT0 and INT1

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PROGRAMMING EXTERNAL HARDWARE INTERRUPTS


Level-triggered interrupt
INT0 and INT1 pins are normally high if low-level signal is applied, it triggers the interrupt microcontroller stops whatever it is doing and jumps to the interrupt vector table to service the interrupt the lowlevel signal must be removed before the execution of the last instruction of the interrupt service routine, RETI otherwise, another interrupt will be generated

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Example Assume that the INT1 pin is connected to a switch that is normally high. Whenever it goes low, it should turn on an LED. The LED is connected to P1.3 and is normally off. When it is turned on it should stay on for a fraction of a second. As long as the switch is pressed low, the LED should stay on.
.

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PROGRAMMING EXTERNAL HARDWARE INTERRUPTS


Sampling the low level-triggered interrupt
to ensure the activation of the hardware interrupt at the INTx pin, make sure that the duration of the low-level signal is around 4 machine cycles

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PROGRAMMING EXTERNAL HARDWARE INTERRUPTS


Edge-triggered interrupts

TCON (Timer/Counter) Register (Bit-addressable)

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Example Assuming that INT1 is connected to a pulse generator. Write a program in which the falling edge of the pulse will send a high to P 1.3, which is connected to an LED.

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INTERRUPT PRIORITY IN THE 8051/52


Interrupt priority upon reset

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