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Uart Dma

This document describes the design of a UART IP soft core using DMA mode to improve system performance. The objectives are to design a UART IP soft core with DMA and reduce CPU time spent on data transmission. DMA allows data transfer between memory and peripherals without CPU intervention. The design uses finite state machines and less logic, leading to faster operation. Simulation results show the transmitter, receiver, DMA and top module operations. Using DMA and less logic improves system performance over traditional interrupt and polling modes. Applications include communication devices like GPS and GPRS.

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217 views26 pages

Uart Dma

This document describes the design of a UART IP soft core using DMA mode to improve system performance. The objectives are to design a UART IP soft core with DMA and reduce CPU time spent on data transmission. DMA allows data transfer between memory and peripherals without CPU intervention. The design uses finite state machines and less logic, leading to faster operation. Simulation results show the transmitter, receiver, DMA and top module operations. Using DMA and less logic improves system performance over traditional interrupt and polling modes. Applications include communication devices like GPS and GPRS.

Uploaded by

lokesh5701
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PPT, PDF, TXT or read online on Scribd
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Optimized Design Of UART IP Soft Core Based On DMA Mode

Under The Guidance of B.Kishore Kumar (Assistant professor)

Presented By K.Narendar M.Tech VLSISD 09671D5704

Objectives
Designing UART IP Soft-core with DMA. Improving the system performance by reducing the elapsed time of CPU greatly in Data transmission process.

Need of DMA
Present UART IP softcore based on Interrupt mode: attaining attention of CPU to get access to a resource. Polling mode: checking periodically until a prespecified event (read,wite) occurs.

Intellectual Property(IP) core


A reusable unit of logic, cell or module that is the intellectual property of one party. Many of the best known IP cores are soft core designs

Types of IP
Soft cores: Hardware Description Language model of a design Hard cores: physical layout information

Normal Design Vs Optimized Design


Normal design
Start 1 Data d0,d1,d2..d7 8 parity 1 Stop 1 ------------11 -------------

Optimized design
Start 1 Data d0,d1,d2d7 1 Parity 1 Stop 1 ----------------4 ----------------

Finite State Machine


A set of states that follow a certain path, each
state has transitions to other states.
Uses less logic , leading to the development of faster digital hardware systems.

Block Diagram

Transmitter State Machine

Transmitter State Machine

idle
stop start

parity

data

Receiver State Machine

Receiver State Machine

idle
stop start

parity

data

DMA
Method of data transfer between regions in the memory space or between memory and peripherals without intervention by the cpu.

Parity_enable Parity_phase rxd read

Rx_error parity_error Data_out 01010101

Parity_enable Parity_phase txd 111 100 data

1 Tx_free
Tx_en

RX

TX

rxdv

Uart_read Uart2dma_data

Uart_write 1 1 Dma2uart_data

Uart_rxdv

01010101
Dma_done 1 Mem_rd rd wr addr data 01010101

Enable_dma start_dma Program_dma reg_data Reg_addr


Uart_txfree Mem2dma_data

DMA

Mem_wr 1 Mem_addr 00000000 00000000 Dma2mem_data

MEMORY Data_out

01010101

Transmitter Simulation Results

Receiver Simulation Results

DMA Simulation Results

DMA Simulation Results(contd..)

Top module simulation results

Top module simulation results(contd)

Top module simulation results(contd)

Top module simulation results(contd)

Advantages & Applications


CPU will be free from data transmission process and Less logic is used GPRS,GPS and other communication devices

Conclusion
IP Soft-core of UART is a better choice for faster communication device. As the design uses less logic system performance will be improved greatly

References
[1] L. K. Hu and Q.CH. Wang, UART-based Reliable Communication and performance Analysis , Computer Engineering, Vol 32 No. 10, May 2006, pp15-21 [2] Yang fuguang. Efficient UART communication and its applications based on DMA in ARM. Chinese Academic Journal Web Publishing General Library,2008. [3] Altera Corp, UART Core Users Guide [4] http://www.freebsd.org/doc/en_US.ISO8859-1/articles/serialUART/index.html [5] http://www.asic-world.com/examples/verilog/UART.html [6] http://opencores.org/ [7] http:// www.amba.com. [8] Lingge Jiang,Theories and Methods For Reactive Energy Measurement,Zhangjiajie Power Bureau, Zhangjiajie 427000,China.

Thank You

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