VHDL Lab Tutorial
VHDL Lab Tutorial
Introduction
What is VHDL?
1. VHDL stands for ( very high speed integrated circuit hardware description language)
2. as a HDL ( hardware description language) VHDL is used for formal description and design of digital logic, it describes the circuit's operation, its design and organization, and simulates the design to test and verify its operation.
For the purpose of our lab we will be using the vhdl compiler (ghdl)
First we will simulate (or execute) a simple hello world program for the sake of demonstration. Second we will move on to simulate a 1 bit adder And finally you will simulate and submit a 4 bit adder for grading
Hello world
Start by creating a new directory under the home folder and name it project1
Hello world
In the project1 directory add a text file Open the text file with gedit and paste in the source code for the hello world program Click on the edit menu and hit preferences a window will appear highlight the plugins tab and select both external tools and python console Finally rename the file to hello and change the extension to .vhdl
Hello world
Hello world
Clicking on the dash home search for the terminal (or the cmd from the start menu on windows) Now change the directory to simplify things a notch by typing the command (in our case only) cd /home/ubuntu/project1
Hello world
Hello world
To analyze the code type the command To elaborate the program type the command And to run the executable file (or simulate) type the command If everything was correct the phrase hello benedict college should be printed in the terminal
ghdl -a hello.vhdl
ghdl -e hello_world
ghdl -r hello_world
Hello world
Although it is possible to write and compile general programs as in the hello world example, it is generally used for hardware design that why we will take a look at a one bit adder The procedures for simulating a one bit adder is different in the sense that the source code is of no use without a way to test it To test our one bit adder we integrate a testbench into our design
As with the hello world example we will start by creating a new directory and naming it project2 Next create two text documents one for the source code and another for the testbench Paste, rename to src and testbench, and change the file extension to .vhdl
As always after staring the terminal change the directory using the cd command Now analyze both commands respectively
ghdl -e TEST_ADD
And finally compile the testbench You may wish to create a .vcd file to view the wave using gtkwave If compiled correctly you should end up with vcd file in the project2 directory which can be viewed with gtkwave
ghdl -r TEST_ADD
Now its your turn using the provided source code and testbench design and simulate a four bit adder Along with the adder run the results in the gtkwave wave utility Finally submit your work for grading along with a step by step explanation for how your work was conducted
entity hello_world is
end hello_world; architecture behaviour of hello_world is
-- Simulation Tutorial
-- 1-bit Adder
-- This is just to make a reference to some common things needed. LIBRARY IEEE;
use IEEE.STD_LOGIC_1164.ALL; -- We declare the 1-bit adder with the inputs and outputs
-- 1-bit Adder Testbench -- A testbench is used to rigorously tests a design that you have made. -- The output of the testbench should allow the designer to see if
-- the design worked. The testbench should also report where the testbench
-- failed.
-- 1-bit Adder -- This is just to make a reference to some common things needed. LIBRARY IEEE; use IEEE.STD_LOGIC_1164.ALL; -- We declare the 1-bit adder with the inputs and outputs -- shown inside the port().
-- 1-bit Adder Testbench -- A testbench is used to rigorously tests a design that you have made. -- The output of the testbench should allow the designer to see if
-- the design worked. The testbench should also report where the testbench
-- failed.