Computer Architecture Question Anna University
Computer Architecture Question Anna University
J7655
1. 2. 3. 4. 5. 6. 7. 8. 9. 10.
What are the choices for encoding instruction set? What is speculation? Give an example.
What are the approaches used for multithreading? Which block should be replaced on a cache Miss? How is cache performance improved?
11.
12
0
(a) (i) (ii)
Describe the operations designed for media and signal processing. (10)
Explain the ways in which a computer architect can help the compiler writer. (6) Or
12 0
PART A (10 2 = 20 Marks) PART B (5 16 = 80 Marks)
12 0
Maximum : 100 Marks
(b)
(i)
(ii)
Describe the addressing modes and instructions designed for control flow. (9)
12.
(a)
Explain the techniques to overcome data hazards with dynamic scheduling. (16) Or
Explain the basic VLIW approach used for static multiple issue. (8)
Enumerate the crosscutting issues in hardware and software speculation mechanisms. (8) Or
(ii)
Describe the basic compiler techniques for exposing instruction level parallelism. (8) Describe the design challenges in SMT processors . Discuss the performance of shared memory multiprocessors. Or (8) (8)
14.
(a)
(i) (ii)
(b)
(i)
Explain the synchronization mechanisms designed for large scale multiprocessors. (9) Discuss the details of memory consistency models. (7)
Explain the concept of miss penalty and out of order execution in processors. (6) Discuss the methods of interface between CPU and memory. (10) Or (16)
12
(b)
12 0
2
(b)
(i)
Explain the hardware support for exposing more parallelism at compile time. (8)
12 0
(16)
addressing
modes
used
for
signal
processing (7)
J7655