SPECIFICATION CUSTOMER :

MODULE NO.: AGM 0070WT

APPROVED BY:
( FOR CUSTOMER USE ONLY ) PCB VERSION: DATA:

SALES BY

APPROVED BY

CHECKED BY

PREPARED BY

VERSION

DATE

REVISED PAGE NO.

SUMMARY

2011.07.21

12

Update the length of the TS-FPC.

Contents
1. Module Classification Information 2. General Specification 3. Block Diagram 4. Electrical Characteristics 5. Absolute Maximum Ratings 6. Interface Pin Function 7. Electro-optical Characteristics 8. Contour Drawing 9. AC Characteristics 10. Data transfer order Setting 11. Register Depiction 12. LED driving conditions

13. Touch panel Information 14. Reliability Test

3 30

2.General Specification
Parameter Screen size Display Resolution Active area Dot Pitch Pixel size Surface treatment Color Saturation (NTSC) Pixel Configuration Outline dimension Weight View Angle direction (Gray inversion) Interface Type LCD Type Color Depth Specifications 7(Diagonal) 800 RGB x 480 152.4x91.44 63.5 x 190.5 190.5 x 190.5 Anti-glare 45 RGB Vertical Stripe 165(W) x 104.44(H) x 7.09 (D) TBD 6 oclock TTL TN 262,144 Unit inch pixel mm um um % mm g ---colors

3.Block Diagram

SCAN DRIVER IC

DC/DC

INPUT CONNECTOR

DCLK R0~R5 G0~G5 B0~B5 DE VCC GND

LVDS INPUT/

TIMING CONTROLLER

TFT LCD PANEL

Control-Board

Data Bus 8bit 16bit

SSD1963 LDO

DC/DC CONVERTER &

REFERENCE VOLTAGE GENERATOR

DTAA DRIVER IC

VL

LED CONNECTOR

BACKLIGHT UNIT

4.Electrical Characteristics
4-1. ELECTRICAL CHARACTERISTICS OF LCM ITEM
Power supply for logic

SYMBOL
VDD VOH VOL VIH

CONDITION
VDD-DGND Output high voltage

MIN.
3.0 0.8VDD

TYP.
3.3

MAX.
3.6

UNIT
V

Output voltage

Output low voltage

0.2VDD 0.8VDD VDD +0.5 V 0.2VDD

Input high voltage Input low voltage

Input Voltage VIL Recommended TFT Driving IVDD Current for 25

VDD=3.3V IAK=160mA

200

260

mA

Brightness

Pattern :All on (White Color)

300.0

350.0

cd/m2

5.Absolute Maximum Ratings

5-1.ENVIRONMENTAL ABSOLUTE MAXIMUM RATINGS WIDE TEMP ITEM OPERSTING MIN. Ambient Temperature() -20 Humidity Condensation) Note 2 Ta 70:75%RH MAX. Note 3 Please refer to item of reliability test. Note 4 Background color will change slightly depending on ambient temperature. That phenomenon is reversible. (Without Note 2,4 MAX. 70 STORAGE MIN. -30 Note 3,4 MAX. 80

6.Interface Pin Function

LCM PIN Definition Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Symbol GND VDD NC A0 R/W E DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 CS Pin No. 16 17 18 19 20 Symbol NC NC RST NC NC

LED BACKLIGHT (CN2): JST BHSR-02VS-1 Pin No. 1 Symbol A

2 K CORRESPONDABLE BACKLIGHT CONNECTOR : SM 02B-BHSS-1

7.Electro-optical Characteristics

Note 1: Definition of viewing angle range

Definition of viewing angle Note 2: Test equipment setup: After stabilizing and leaving the panel alone at a driven temperature for 10 minutes, the measurement should be executed. Measurement should be executed in a stable, windless, and dark room. Optical specifications are measured by Topcon BM-7 luminance meter 1.0 field of view at a distance of 50cm and normal direction.

Optical measurement system setup Note 3: Definition of Response time: The response time is defined as the LCD optical switching time interval between White state and Black state. Rise time, Tr, is the time between photo detector output intensity changed from 90to 10. And fall time, Tf, is the time between photo detector output Intensity changed from10to 90.

Note 4: Definition of contrast ratio: The contrast ratio is defined as the following expression.

Note 5: White Vi = Vi50 1.5V Black Vi = Vi50 2.0V means that the analog input signal swings in phase with VCOM signal. means that the analog input signal swings out of phase with VCOM signal. The 100% transmission is defined as the transmission of LCD panel when all the input terminals of module are electrically opened. Note 6: Definition of color chromaticity (CIE 1931) Color coordinates measured at the center point of LCD Note 7: Measured at the center area of the panel when all the input terminals of LCD panel are electrically opened.

8. Contour Drawing
165.000.3 155.300.3 155.00(V A )TP 154.00(A A )TP 152.40(V A ) 84.800.3 1.43 7.15 7.30 7.80 1.45 5.200.3 2.65 2.35 1.72 6.59

TOP 48.870.3

92.44(AA)TP

93.04(VA)TP

91.44(VA)

94.300.3

L EFT

R IG H T

B O T TO M

60.05.0 61.71.0

104.440.3

5.70 7.09M A X

1 27.30 0.300.05

PIN 1 R IG H T PIN 2 B O T TO M PIN 3 L EFT PIN 4 T O P

61.000.5 97.50
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 GND VDD NC A0 R/W E DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 CS NC NC RST NC NC

40

CON1 40 1

P0.5*31=15.500

19.5 23.6

P1.0*19=19.0

CON3

32

22

CN-FPC-20P/P1.0 (Up-Side)

94.00

1 4 0.30 0.50 P0.5*3=1.50 2.50

3.00

CON2

20.0

43.300.5

9. AC Characteristics
Conditions: Voltage referenced to VSS VDDD, VDDPLL = 1.2V VDDIO, VDDLCD = 3.3V TA = 25C CL = 50pF (Bus/CPU Interface) CL = 0pF (LCD Panel Interface) 9.1 Clock Timing Table 9-1:Clock Input Requirements for CLK (PLL-bypass) Symbol Parameter Min Max FCLK Input Clock Frequency (CLK) 110 TCLK Input Clock period (CLK) 1/fCLK Table 9-2:Clock Input Requirements for CLK Symbol Parameter Min FCLK Input Clock Frequency (CLK) 2.5 TCLK Input Clock period (CLK) 1/fCLK

Units MHz ns

Max 50

Units MHz ns

Table 9-3:Clock Input Requirements for crystal oscillator XTAL Symbol Parameter Min Max Units FXTAL Input Clock Frequency 2.5 10 MHz TXTAL Input Clock period 1/fXTAL ns

9.2 MCU Interface Timing 9.2.1 Parallel 6800-series Interface Timing Table 9-4: Parallel 6800-series Interface Timing Characteristics (Use CS# as clock) Symbol Parameter Min Typ Max Unit fMCLK System Clock Frequency* 1 110 MHz 1/ fMCLK tMCLK System Clock Period* ns 1.5* tMCLK Control Pulse High Write 13 tPWCSH ns 3.5* tMCLK Width Read 30 1.5* tMCLK Control Pulse Low Write (next write cycle) 13 9* tMCLK tPWCSL Width ns Write (next read cycle) 80 9* tMCLK Read 80 tAS Address Setup Time 2 ns tAH Address Hold Time 2 ns tDSW Data Setup Time 4 ns tDHW Data Hold Time 1 ns tPLW Write Low Time 14 ns tPHW Write High Time 14 ns tPLWR Read Low Time 38 ns tACC Data Access Time 32 ns tDHR Output Hold time 1 ns tR Rise Time 0.5 ns tF Fall Time 0.5 ns * System Clock denotes external input clock (PLL-bypass) or internal generated clock (PLL-enabled)
Figure 9-1: Parallel 6800-series Interface Timing Diagram (Use CS# as Clock)

Table 9-5: Parallel 6800-series Interface Timing Characteristics (Use E as clock) Symbol fMCLK tMCLK Parameter Min Typ Max Unit System Clock Frequency* 1 110 MHz 1/ fMCLK System Clock Period* ns 13 Write (next write cycle) 1.5* tMCLK Control Pulse Low 9* tMCLK tPWCSH ns Write (next read cycle) 80 Width 9* tMCLK Read 80 Control Pulse High Write 13 1.5* tMCLK tPWCSL ns 3.5* tMCLK Width Read 30 tAS Address Setup Time 2 ns tAH Address Hold Time 2 ns tDSW Data Setup Time 4 ns tDHW Data Hold Time 1 ns tPLW Write Low Time 14 ns tPHW Write High Time 14 ns tPLWR Read Low Time 38 ns tACC Data Access Time 32 ns tDHR Output Hold time 1 ns tR Rise Time 0.5 ns tF Fall Time 0.5 ns * System Clock denotes external input clock (PLL-bypass) or internal generated clock (PLL-enabled) Figure9-2: Parallel 6800-series Interface Timing Diagram (Use E as Clock)

9.2.2 Parallel 8080-series Interface Timing Table 9-6: Parallel 8080-series Interface Symbol fMCLK tMCLK Parameter Min Typ Max Unit System Clock Frequency* 1 110 MHz 1/ fMCLK System Clock Period* ns Control Pulse High Write 13 1.5* tMCLK tPWCSL ns 3.5* tMCLK Width Read 30 13 Write (next write cycle) 1.5* tMCLK Control Pulse Low 9* tMCLK tPWCSH ns Write (next read cycle) 80 Width 9* tMCLK Read 80 tAS Address Setup Time 1 ns tAH Address Hold Time 2 ns tDSW Write Data Setup Time 4 ns tDHW Write Data Hold Time 1 ns tPWLW Write Low Time 12 ns tDHR Read Data Hold Time 1 ns tACC Access Time 32 ns tPWLR Read Low Time 36 ns tR Rise Time 0.5 ns tF Fall Time 0.5 ns tCS Chip select setup time 2 ns tCSH Chip select hold time to read signal 3 ns * System Clock denotes external input clock (PLL-bypass) or internal generated clock (PLL-enabled) Figure 9-3: Parallel 8080-series Interface Timing Diagram (Write Cycle)

Figure 9-4: Parallel 8080-series Interface Timing Diagram (Read Cycle)

10. Data transfer order Setting

Pixel Data Format Both 6800 and 8080 support 8-bit, 9-bit, 16-bit, 18-bit and 24-bit data bus. Depending on the width of the data bus, the display data are packed into the data bus in different ways. Table 8-1: Pixel Data Format
D[23] D[22] D[21] D[20] D[19] D[18] D[17] D[16] D[15] D[14] D[13] D[12] D[11] D[10] D[9] D[8] D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

Interface

Cycle

24 bits 18 bits 16 bits (565 format)

1st 1st

R7

R6

R5

R4

R3

R2

R1 R5

R0 R4

G7 R3

G6 R2

G5 R1

G4 R0

G3 G5

G2 G4

G1 G3

G0 G2

B7 G1

B6 G0

B5 B5

B4 B4

B3 B3

B2 B2

B1 B1

B0 B0

1st 1st

R5 R7 B7 G7

R4 R6 B6 G6

R3 R5 B5 G5

R2 R4 B4 G4

R1 R3 B3 G3 R7 G3

G5 R2 B2 G2 R6 G2

G4 R1 B1 G1 R5 G1

G3 R0 B0 G0 R4 G0 R5 G2

G2 G7 R7 B7 R3 B7 R4 G1 R7 G7 B7

G1 G6 R6 B6 R2 B6 R3 G0 R6 G6 B6

G0 G5 R5 B5 R1 B5 R2 B5 R5 G5 B5

B5 G4 R4 B4 R0 B4 R1 B4 R4 G4 B4

B4 G3 R3 B3 G7 B3 R0 B3 R3 G3 B3

B3 G2 R2 B2 G6 B2 G5 B2 R2 G2 B2

B2 G1 R1 B1 G5 B1 G4 B1 R1 G1 B1

B1 G0 R0 B0 G4 B0 G3 B0 R0 G0 B0

16 bits

2nd 3rd 1st

12 bits

2nd 1st 2nd 1st

9 bits

8 bits

2nd 3rd

11 Register Depiction
Please consult the spec of SSD1963 Version 1.2

12. LED driving conditions

Parameter Symbol Min. Typ. Max. Unit Remark LED current ILED 160 mA Note 1 LED voltage VLED 9.9 V LED Life Time 10,000 20,000 Hr Note 2 Note 1 : There are 8 Groups LED shown as below , VLED=9.9V , ILED=160mA.

Note 2 : Brightess to be decreased to 50% of the initial value.

13.Touch panel Information

Pin 1 2 3 4

Symbol X1 Y1 X2 Y2

I/O Right Bottom Left Top

Function Right electrode - differential analog Bottom electrode - differential analog Left electrode differential analog Top electrode - differential analog

Non-Proper Ways to handle the touch screen

1. Do not pull or crease the tail of the touch screen. Tails, unless the drawing calls out for a bend, are to be free of permanent creases in the polyester, slight crease lines in the adhesive tail cover are allowed

14.Reliability Test
WIDE TEMPERATURE RELIABILITY TEST N ITEM CONDITION O. 1 2 3 4 5 6 High Temp. Storage Low Temp. Storage High Temp. & High Humi. Storage High Temp. Operating Display Low Temp. Operating Display Thermal Shock 80 -30 60 90%RH 70 -20 240 Hrs 240 Hrs 240 Hrs 240 Hrs 240 Hrs STANDARD Appearance without defect Appearance without defect Appearance without defect Appearance without defect Appearance without defect Appearance without defect 10 cycles NOTE

-20 , 30min. 70, 30min.

Inspection Provision
1.Purpose The AGT inspection provision provides outgoing inspection provision and its expected quality level based on our outgoing inspection of AGT LCD produces.

The AGT inspection provision is applicable to the arrangement in regard to outgoing inspection and quality assurance after outgoing. 3.Technical Terms 3-1 AGT Technical Terms

4.Outgoing Inspection 4-1 Inspection Method MIL-STD-105E Level Regular inspection 4-2 Inspection Standard Major Defect Dots Solder appearance Cracks Item Opens Shorts Erroneous operation Shorts Loose Display surface cracks AQL(%) Remarks 0.4 Faults which substantially lower the practicality and the initial purpose difficult to achieve

Dimensions Minor Defect Inside the glass Polarizing plate Dots Color tone Solder appearance

External from Dimensions Black spots Scratches, foreign Matter, air bubbles, and peeling Pinhole, deformation Color unevenness Cold solder Solder projections

0.4 0.65 Faults which appear to pose almost no obstacle to the practicality, effective use, and operation

4-3 Inspection Provisions *Viewing Area Definition

A : Zone Viewing Area B : Zone Glass Plate Outline *Inspection place to be 500 to 1000 lux illuminance uniformly without glaring. The distance between luminous source(daylight fluorescent lamp and cool white fluorescent lamp) and sample to be 30 cm to 50 cm.

*Test and measurement are performed under the following conditions, unless otherwise specified. Temperature 20 15 Humidity 65 20%R.H. Pressure 860~1060hPa(mmbar) In case of doubtful judgment, it is performed under the following conditions. Temperature 20 2 Humidity 65 5%R.H. Pressure 860~1060hPa(mmbar)

5.Specification for quality check 5-1-1 Electrical characteristics : NO. 1 2 3 4 Item Non operational Miss operating Contrast irregular Response time Criterion Fail Fail Fail Within Specified value

5-1-2 Components soldering : Should be no defective soldering such as shorting, loose terminal cold solder, peeling of printed circuit board pattern, improper mounting position, etc. 5-2 Inspection Standard for TFT panel 5-2-1 The environmental condition of inspection : The environmental condition and visual inspection shall be conducted as below. (1) Ambient temperature : 255 (2) Humidity : 25~75% RH (3) External appearance inspection shall be conducted by using a single 20W fluorescent lamp or equivalent illumination. (4) Visual inspection on the operation condition for cosmetic shall be conducted at the distance 30cm or more between the LCD panels and eyes of inspector. The viewing angle shall be 90 degreeto the front surface of display panel. (5) Ambient Illumination : 300~500 Lux for external appearance inspection. (6) Ambient Illumination : 100~200 Lux for light on inspection. 5-2-2 Inspection Criteria (1) Definition of dot defect induced from the panel inside a) The definition of dot : The size of a defective dot over 1/2 of whole dot is regarded as one defective dot b) Bright dot : Dots appear bright and unchanged in size in which LCD panel is displaying under black pattern. c) Dark dot : Dots appear dark and unchanged in size in which LCD panel is displaying under pure red, green, blue pattern. d) 2 dot adjacent = 1 pair = 2 dots Picture :

(2) Display Inspection NO. Acceptable Count Random N2 Bright Dot 2 dots adjacent N0 Dot defect Random N3 Dark Dot 2 dots adjacent N1 Total bright and dark dot N4 Functional failure (V-line/ H-line/Cross line etc.) Not allowable It's OK if mura is slight visible through 6% ND filter. (Judged Mura by limit sample if it is necessary) Newton Orbicular of interference fringes is not allowed in the optimum ring (touch contrast within the active area under viewing angle. panel) Item

(3) Appearance inspection

NO. 1 2 3 4 5 6 7 8

Item Panel Crack Broken CF Non -lead Side of TFT Broken Lead Side of TFT Broken Corner of TFT at Lead Side Burr of TFT / CF Edge Foreign Black / White/Bright Spot Foreign Black / White/Bright Line Color irregular

Standards Not allow. It is shown in Fig.1. The broken in the area of W > 2mm is ignored, L is ignored. It is shown in Fig.2. FPC lead, electrical line or alignment mark can't be damaged. It is shown in Fig.3. FPC lead. electrical line or alignment mark can't be damaged. It is shown in Fig.4. The distance of burr from the edge of TFT / CF, W 0.3mm. It is shown in Fig.5. (1) 0.15 < D 0.5 mm, N 4 ; (2) D 0.15mm, Ignore. It is shown in Fig.6. (1) 0.05<W 0.1 mm, 0.3<L2 mm, N 4. (2) W 0.05mm and L 0.3mm Ignore. It is shown in Fig.7. Not remarkable color irregular.

Fig 1. C rack

Fig 2. w b a D =(a+b)/2 N otes 1.W :W idh 2.L engh 3.D :A verage D iam eter 4.N :C ount 5.A ll the anhle of the broken m ust be larger than 90.It is show n in F ig.8.(R >90) w L

A ctive A rea

A ctive A rea

L Fig 3. w
L ead A rea

Fig 4. w L
BM D ot A rea

BM

Fig 7.

Fig8.

R >90

Fig 5.

Fig 6.

NOTICE: SAFETY 1. If the LCD panel breaks, be careful not to get the liquid crystal to touch your skin. 2. If the liquid crystal touches your skin or clothes, please wash it off immediately by using soap and water. HANDLING 1. Avoid static electricity which can damage the CMOS LSI. 2. Do not remove the panel or frame from the module. 3. The polarizing plate of the display is very fragile. So, please handle it very carefully. 4. Do not wipe the polarizing plate with a dry cloth, as it may easily scratch the surface of plate. 5. Do not use ketonics solvent & Aromatic solvent. Use a soft cloth soaked with a cleaning naphtha solvent. STORAGE 1. Store the panel or module in a dark place where the temperature is 255 and the humidity is below 65% RH. 2. Do not place the module near organics solvents or corrosive gases. 3. Do not crush, shake, or jolt the module. TERMS OF WARRANT 1. Acceptance inspection period The period is within one month after the arrival of contracted commodity at the buyer's factory site. 2. Applicable warrant period The period is within twelve months since the date of shipping out under normal using and storage conditions.