Phase-Controlled Converter: Objectives
Phase-Controlled Converter: Objectives
Prof. Jevti
Phase-Controlled Converter
Objectives 1. Learn how to generate the firing signals using reference and timing waveforms. 2. Simulate a full-bridge phase-controlled rectifier. 3. Simulate a full-bridge phase-controlled converter. Instructions (Items shown boxed should be submitted with the report.) A. Front matter 1. Cover page to include: course number, course name, simulation number, simulation title, your name, date simulation due, date simulation submitted. 2. Copy of these instructions. B. Firing Signals: General The timing of the firing signals for the SCRs in a full-bridge converter may be derived from the formula:
VAVG = VAVG ,max cos ,
(1)
which holds both for single and 3-phase converters, where VAVG is the desired average output voltage, VAVG ,max is the maximum available average output voltage and is the firing angle. 1 1. Provide an expression for VAVG ,max for an ideal single-phase full-bridge phase-controlled
1 converter connected to an AC source of amplitude Vm . What is the value of VAVG ,max for
Vm = 120V 2 = 170V ?
3 2. Provide an expression for VAVG ,max for an ideal 3-phase full-bridge phase-controlled
To implement formula (1) in practice, we may compare two signals, a reference signal given by:
vREF = VAVG VAVG ,max ,
(2)
(3)
Page 1 of 8
Prof. Jevti
where t0 is the instant a given SCR device first becomes forward biased during a given cycle of the supply voltage. If we denote by t1 the instant when the two signals are equal, we have:
VAVG = cos (t1 t0 ) VAVG = VAVG ,max cos (t1 t0 ) . VAVG ,max
(4)
When we compare (4) to (1), we see that (t1 t0 ) exactly equals the desired firing angle . To summarize, the timing waveform for a SCR device is a cosine function of the same frequency as the source but phase shifted in such a way that the peak of the cosine is aligned with the instant of the forward bias of the same SCR device. The SCR should be fired at the instant when the reference signal equals the timing signal. C. Phase-Controlled Rectifier: Circuit Components Figs. 1 and 2 show the phase-controlled rectifier and the corresponding gate driver circuit, respectively. You should construct both in the same Schematics Capture window. If desired, the workspace may be enlarged by selecting Options Sheet Properties Workspace Custom size and choosing the desired width and height.
L
0
T1 2
3
T2 2
3
G1
D2 2N1599
G2
XMM1 C R 100
T3 2
3
T4 2
3
D3 2N1599
G2
D4 2N1599
G1
Fig. 1 Single-phase full-bridge phase-controlled rectifier. Please note that the AC source Vs in Fig.1 is not grounded. Source Vs models the secondary of an isolation transformer which is required in full-bridge circuits whenever the load is grounded as in Fig. 1. 1. Which of the diodes D1 thru D4 in Fig.1 would be shorted if the lower end of the AC source was grounded?
Page 2 of 8
Prof. Jevti
Determine the values of the ripple filter inductor L and capacitor C from the following considerations: a) let the inductive reactance X L = L be approximately 10 times larger than the load resistance R, b) let the capacitive reactance X C = 1 (C ) be approximately 10 times smaller than the load resistance R, and c) let = 2 f RIPPLE be the angular frequency of the 1st harmonic of the ripple waveform. 2. What is the ripple frequency f RIPPLE of a full-wave rectified sinusoid? 3. What value of L satisfies the condition a) above? 4. What value of C satisfies the condition b) above? 5. Build the circuit of Fig. 1 in Multisim. Use TS_XFMR1, found in Master Database Basic Transformer, with 1:1 turn ratio for gate drive pulse transformers T1 thru T4. For AC source, use Master Database Sources POWER_SOURCES AC_POWER component. XMM1 is a multimeter set to measure DC voltage across the load. 6. Label the input pins of the pulse transformers G1 and G2 as shown in Fig. 1. 7. Provide a printout of your completed single-phase rectifier Multisim schematic, as in Fig.1, showing all component values. D. Phase Controlled Rectifier: Gate Driver Circuit The gate driver circuit is shown in Fig. 2. It includes a reference voltage setting potentiometer Rp and two timing waveform generators Vtime1 and Vtime2. Only two timing waveforms are required because thyristors D1 and D3 fire together, just as thyristors D2 and D4 fire together. As explained in Section B, the timing waveform is a unit amplitude cosine function whose peak should be aligned with the instant of forward bias for a given SCR.
Rp Vdc 1k 0.99 V Key=A 50%
Vref Vtime1
U1 C1 G1 R1 200
COMPARATOR_VIRTUAL U2 C2
G2 R2 200
1 Vpk 60 Hz 90
COMPARATOR_VIRTUAL
Page 3 of 8
Prof. Jevti
1. For Vtime, use Master Database Sources SIGNAL_VOLTAGE_SOURCES AC_VOLTAGE components. Double-click on the component and under the value tab set peak voltages to 1V and phases to 900 for Vtime1 and 900 for Vtime2, as shown in Fig. 2. 2. For Vdc, use 0.99V to assure that Vref=Vtime always has a numerical solution, even with the wiper of the potentiometer fully up. The circuit would never fire if Vref>1V. 3. For the comparators, use Master Database Analog ANALOG_VIRTUAL COMPARATOR_VIRTUAL components. 4. The RC circuits at the output of the comparators serve to shape the square-wave voltage from the comparator into approximately 200s wide pulses suitable for driving the SCR gates. Calculate the values of C1 and C2 such that both RC circuits have a time constant of 200s. 5. Label the gate drive signals G1 and G2, as shown in Fig. 2. If asked, allow Multisim to virtually connect the newly labeled nodes G1 and G2 with the identically named nodes in Fig. 1. This will connect the gate drive signals with the pulse transformers without actually drawing a wire, thus making the schematics easier to read. 6. Provide a printout of your completed gate driver Multisim schematic, as in Fig. 2, showing all component values. E. Phase-Controlled Rectifier: Waveforms 1. Verify the correct operation of the gate driver by observing the key waveforms on the 4channel oscilloscope as shown in Fig. 3. The expected waveforms for driver G1 are shown in Fig. 4 with the potentiometer set at 50%.
XSC1
G T A B C D
Vref Vtime1
U1 C1 G1 R1 200
1 Vpk 60 Hz -90
COMPARATOR_VIRTUAL U2
Page 4 of 8
Prof. Jevti
Fig. 4 Key waveforms for G1 gate driver obtained with the setup shown in Fig. 3 and potentiometer set at 50%. Time scale is 5ms/div. Reference voltage is shown red (500mV/div), timing waveform is shown green (500mV/div), comparator output is shown blue (2V/div), and the G1 gate drive voltage is shown yellow (1V/div). 2. Provide a waveform printout similar to Fig. 4 but for gate driver G2 and potentiometer set at 75%. 3. Verify the correct operation of the single-phase rectifier by observing the waveforms on a 4-channel oscilloscope as illustrated in Fig. 5 for potentiometer set at 50%.
Fig. 5 Detail of the waveform test circuit for the single-phase rectifier.
Page 5 of 8
Prof. Jevti
Fig. 6 Rectifier output waveforms obtained with the setup shown in Fig. 5 and potentiometer set at 50%. Time scale is 5ms/div, voltage scale is 100V/div. The unfiltered and filtered rectified waveforms are shown in red and blue, respectively. 4. Provide a waveform printout similar to Fig. 6, but with potentiometer set at 75%. 5. Repeat 4 but change the coupling on the oscilloscope to AC, for the filtered channel only. This will remove the DC component and help you visualize the small ripple in the load voltage. Adjust the scale to clearly show the output ripple. 6. What is the peak-to-peak value of the ripple voltage across the load for potentiometer set at 75%? 7. Change the potentiometer setting rapidly from 50% to 100% while the simulation is running and the output waveforms are displayed on the scope as in Fig. 6. Explain why does the filtered waveform change relatively slowly, even as the unfiltered waveform changes almost instantly. F. Phase-Controlled Converter: DC Side A full-bridge phase-controlled converter is a 2-quadrant converter which can provide output voltages of both polarities but the output current of only one direction. However, the current through a resistive load, such as R in Fig. 1, changes direction when the polarity of the output voltage changes. 1. Replace the LC filter and the resistor R in Fig. 1 by a DC current source as in Fig. 7. 2. Replace the unipolar reference voltage circuit in Fig. 2 by a bipolar circuit of Fig. 7. 3. Provide a printout of the scope screen showing voltage waveform across the current source for: a) 100%, b) 50%, and c) 0% potentiometer settings. 4. Use the multimeter to measure DC output voltage of the converter for potentiometer settings from 0% to 100% in 10% increments. Provide a plot of the output voltage vs. the setting of the potentiometer.
Page 6 of 8
Prof. Jevti
T2 2
3
D2 2N1599
G2
XMM1 I0 1A
Vp 0.99 V Vn 0.99 V
Rp 1k 50% Key=A
Vref
T4 2
3
D4 2N1599
G1
Fig. 7 Modifications to rectifier circuits in Figs. 1 and 2 for inverter mode operation. G. Phase-Controlled Converter: AC Side As the polarity of the converter DC voltage changes from positive to negative, the power absorbed by the current source becomes negative, i.e., it starts to generate electrical power. We will now look at the voltage and current at the AC side of the converter to verify that the DC power generated by the current source is indeed converted to AC power. 1. Modify the converter circuit of section E by removing the ground connection from the DC current source and by connecting the lower end of the AC voltage source to ground, as shown in Fig. 8. This will enable us to measure the AC voltage and current with a scope. 2. Add a 1 shunt resistor as shown for AC side current measurement and connect the 4channel scope as shown in Fig. 8. 3. Provide a printout of the scope screen showing the AC voltage and current for a) 100% b) 50%, and c) 0% potentiometer settings. 4. Why is the AC-side current not sinusoidal? 5. What changes as the potentiometer setting is changed: amplitude of the AC-side current (ignore the ringing) or its phase relative to the AC source voltage? Why? 6. How can you tell from the voltage and current waveforms on the AC-side if the converter operates in the rectifier or the inverter mode? H. Discussion 1. Optional: please provide feedback on the simulation process: what was the most novel concept, what took the most time, what was superfluous, what do you feel was the most valuable part, suggestions for improvement, etc.
Page 7 of 8
Prof. Jevti
T1 2
3
T2 2
3
G1
D2 2N1599
G2
XMM1 I0 1A
T3 2
3
T4 2
3
D3 2N1599
G2
D4 2N1599
G1
Page 8 of 8