CLICKER HARDWARE DOCUMENT

Version 2.0
Last Updated- 27th September 2011

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Index
Sr. No. 1 Introduction to Clicker 1.1 Hardware 1.2 Software 2 3 Block diagram representation of Clicker Device Components of the Clicker Hardware 3.1 CC2511 Low-Power SoC with MCU, Memory, 2.4 GHz RF Transceiver, and USB Controller 3.2 TPS79333 ULTRALOW-NOISE, HIGH PSRR, FAST RF 200mA LOW-DROPOUT LINEAR REGULATORS 3.3 PCF8593S Low power clock/ Calendar 3.4 MAX 3232 3.0V to 5.5V, Low-Power, up to 1Mbps, True RS-232 Transceivers 3.5 AD8544 General Purpose CMOS Amplifier 3.6 16x2 LCD display 3.7 Folded Dipole Antenna 3.8 Keyboard 4 List of Figures Fig1- Clicker System Setup Fig 1.1- Clicker Device and Receiver Fig 2- Block diagram of Clicker Device Fig 3.1.1- Pin-out description of CC2511 Fig 3.1.2- Block Diagram of CC2511 Fig 3.2.1- TPS79301 Adjustable LDO Regulator Fig 3.2.2 - TPS79301 Adjustable LDO Regulator package 4 4 6 8 10 11 12 Contents Page No 4 4 5 6 7 7

11

12 14

16 17 19 20

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Sr. No. 4.

Contents Fig 3.3.1- Block Diagram of PCF8593S Fig 3.3.2- Pin Configuration of PCF8593S Fig 3.4- MAX 3232 Pin Configuration Fig 3.5- AD8544 Pin configuration Fig 3.6.1 - LCD Display Fig 3.6.2 - LCD pin Configuration Fig 3.7.1- Folded Antenna PCB Fig 3.7.2- Folded Antenna (1:1 proportion Diagram) Fig 3.7.3- Folded Antenna Dimensions Fig 3.8- Clicker Keyboard

Page No 13 14 15 17 17 18 19 19 19 20

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1. Introduction
Clicker is a student response and interaction system developed at IIT Bombay, as part of the National Mission on Education through Information and Communication Technology (NMEICT), sponsored by MHRD. Clicker system is a synchronous and asynchronous, response and interaction system which can be advantageously used for empowerment of students and teachers in classroom and seminar sessions. It can be used in a classroom to teach the students effectively, and to evaluate performance of the students by keeping records of quizzes. Clicker system provides the facility to the instructor to interact with students by presenting question, collecting answers of individual students, and evaluating understanding of each student on that session. The system can collect the attendance of the students present in the session, and the attendance record can be stored.

2. Clicker System Set-up

Clicker system set up is shown in fig 2.1. Each student will have a handheld device called Clicker which will be associated with his own roll number. The instructor will have a central receiver and other clicker system. Clicker of each student, and receiver of the instructor are configured with RF link so that communication and data transfer from either side are possible in synchronous as well as asynchronous mode. Instructor machine has Clicker software which stores polling results of the quiz and attendance, which can be used for evaluation of the results, and grading.

Fig 2.1- Clicker system set up

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3. Components of clicker System

Basic components of clicker system are listed as below. 3.1 Clicker. 3.2 Central Receiver. 3.3 Appropriate software packages installed computer system. 3.1. Clicker

Fig Clicker device Clicker is embedded communication device. Clicker device consists of processor with in-built RF transceiver, USB interface, serial interface, folded dipole antenna, LCD screen, and keypad. Clicker device is powered by USB supply or a three dry 1.5 cells. Clicker device transmits signals to receiver as well as receives signals from receiver in synchronous as well as asynchronous mode. Clicker and receiver are configured via 2.40GHz RF communication. Clicker device is shown in fig. 3.2. Receiver

Fig - Receiver Receiver is embedded communication device. Receiver consists of processor with in-built RF transceiver, USB interface, serial interface, and folded dipole antenna. Receiver is powered by USB supply. Receiver transmits signals to clickers as well as receives signals from clickers in
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synchronous as well as asynchronous mode. Receiver of the clicker system is shown in the fig. 3.3. Appropriate software packages installed computer system The central receiver of clicker system is connected to the computer system via USB port. The computer system should have installed the following operating system and software packages. Operating System = Ubuntu 9.04 Java = sun-java6-jre Python = Python Serial 2.3-1 Clicker = Clicker software version 2.0

Block diagram of Clicker device

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Fig- Block Diagram of Clicker Device Block diagram of the clicker device is shown in fig. Clicker device consists of CC2511, which is Low-Power system on chip (SoC) with micro-controller unit (MCU), Memory, 2.4 GHz RF Transceiver, and USB Controller. Clicker device requires 4.5 Volts DC supply which can be supplied either by USB supply or dry cells. For voltage regulation purpose TPS79301 is used, which is ultralow- noise, high PSRR, fast RF 200mA low-dropout linear regulator. MAX 3232 is used to run at data rates of 120kbps while maintaining RS-232 output levels.USB connector and audio jack/connector are provided for communication with PC. Folded dipole PCB antenna is used for RF transmission and reception. SD/Memory card is provided in the Clicker device. PCF8593S low power Clock/Calendar is provided in the Clicker device. Keypad is provided which has alphanumeric keys and other control keys. LCD display is used for displaying characters and graphics to the user.

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Clicker device features Module

Processor

Feature
CC2511 Low-Power SoC (6x6 mm package) with MCU, 2.4 GHz RF Transceiver, USB Controller, 32 kB of in-system programmable flash memory, and 4 kB of RAM 4.5 V dc supply, USB power supply. 3.3 V dc voltage output, Ultralow-Noise, High PSSR, fast RF 200mA low-dropout linear regulator in NanoStar wafer chip scale. 3.0V to 5.5V, Low-Power, up to 1Mbps, True RS-232 Transceivers Using Four 0.1F External Capacitors

Power connector Power Regulator

MAX3232 Audio connector USB Port PCB LCD Screen Keypad Debug support

55110 mm, two layer 16 Character 2 line LCD screen 45 , Alphanumeric keypad 10-Pin debugger connector

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Circuit diagram of the Clicker Device

Fig - Circuit diagram of the Clicker Device

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Fig Circuit diagram of the Clicker Device

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PCB Layout

Fig- Front line graphics of Clicker PCB layout

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Fig- Front line graphics of Clicker PCB layout

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Input power
Clicker device can be powered by either USB supply or dry cells. Power is supplied to 3 pin jumper by using either USB supply or dry cells. Output VCC from 3 pin jumper is fed to TPS79333. Single pole single throw (SPST) switch is used for ON or OFF switching of device. TPS79333 is ultralownoise, high PSRR, fast RF 200 mA low-dropout linear regulator which gives fixed 3.3 volts output. A 0.1F tantalum input bypass capacitor connected between IN and GND, is required for stability and improves transient response, noise rejection, and ripple rejection. An output capacitor is connected between OUT and GND of TPS79333 to stabilize the internal control loop. Inductor L1 is used for filtration of noise. Input power circuit design is shown in fig.

Fig- Input power circuit schematic

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Real Time Clock/ Calendar

Real time Clock/ Calendar circuit schematic is shown in fig. A 32.768 kHz crystal oscillator is connected to X1(pin 1) and X2 (pin 2). Capacitors C1 and C2 are used to provide the necessary additional phase shift. Capacitor C13 is backup capacitor, which charges through R18 when power is supplied to PCF8593S, and provides power to PCF8593S when battery is disconnected. Reset switch is connected to pin3, which is active low pin. Pin 4 is grounded. VCC_Batt Power is supplied through Pin8. Serial clock input is supplied through pin6. Serial Data input/output is provided through pin 5. Pin7 is open drain output.

Fig- Real Time Clock/Calendar circuit schematic

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LCD display
A 16x2 (Character x Line) LCD display is used in the Clicker circuit. In this LCD, each character is displayed in 5x7 pixel matrix. The LCD pin configuration is shown in fig.

Fig - LCD pin Configuration The LCD screen circuit schematic is shown in fig. LCD_RS (Selects command register when low; and data register when high), LCD_RW (Low to write to the register; High to read from the register) and, LCD_EN (Sends data to data pins when a high to low pulse is given) are control signals which are input to LCD screen from CC2511 chip. Pin7 to Pin 14 are data pins. Pin 15 and pin 16 are backlight VCC and ground respectively. Pin1 is grounded and Pin2 is connected to DVDD. Potentiometer R1 is for contrast adjustment of LCD screen.

Fig - LCD screen circuit schematic

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MAX3232 circuit schematic

MAX3232 circuit schematic is shown in fig. The MAX3232s internal power supply consists of a regulated dual charge pump that provides output voltages of +5.5V (doubling charge pump) and -5.5V (inverting charge pump), regardless of the input voltage (VCC) over the 3.0V to 5.5V range. Charge pumps are connected to a flying capacitor (C18 = 0.1F, C20 = 0.1F) and a reservoir capacitor (C19 = 0.1F, C24 = 0.1F) to generate the V+ and V- supplies. MAX3232 is powered by DVDD supply through pin 16, and pin 15 is grounded. To avoid power supply noise, VCC to ground is decoupled with 0.1F capacitor. RS232 transmitter output (DOUT1) pin is connected to Tx channel of an audio jack. TTL/CMOS Transmitter Input (DIN1) pin is connected to Tx channel of CC2511.TTL/CMOS Receiver Output (ROUT1) pin is connected to Rx channel of CC2511. RS232 receiver input (RIN1) is connected to Rx channel of an audio jack.

Fig - MAX3232 circuit schematic

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Secure Digital (SD) card interface circuit schematic

SD card interface circuit schematic is shown in fig. DVDD supply is given to pin5 of SD card connector. Pin3 of SD card connector is grounded. Secure digital card Interface bus is a synchronous serial data link, which operates in full duplex mode. Devices communicate in master/slave mode where the master device (CC2511) initiates the data frame. SD_CLK (serial clock signal) is output from CC2511), which is connected to pin.4 of SD card connector. CC2511 sends a bit on the SD_MOSI (Master Output, Slave Input) line, which is connected to the Pin6 of SD card connecter. CC2511 reads a bit from the SD_MISO (Master Input, Slave Output) line, which is connected to the Pin2 of SD card connecter. CC2511 sends chip select signal through SD_CS line, to SD card. Pullup resistors of 10K ohms are connected across SD_CLK, SD_MISO and, SD_MOSI lines.

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Microphone Interface circuit schematic

Microphone Interface circuit schematic is shown in fig. AVDD Supply is connected to the pin4 and pin 11 is grounded. Differential input is applied to pin 5 and pin 6. Microphone is connected to the SMD padding. Output of microphone is connected to the inverting pin of AD8544through coupling capacitor. Coupling capacitor of 1F is used for isolating dc from Op Amp circuit. Resistors R20 and R21 place half of the supply voltage (AVDD) across the non-inverting input. An additional capacitor C31 has been added to the non-inverting input to reduce noise. Resistor R23 of 1K ohm is used as Pull- Up resistor for inverting terminal. To ensure the stability of circuit, a capacitor C32 is connected in parallel with R25.Output of AD8544 is fed to CC2511 through port P0.4 of the MCU.

Fig - Microphone Interface circuit schematic

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3.7 Folded Dipole Antenna:

The folded dipole PCB antenna is used with CC2511. Maximum gain is measured to be 7.4 dB and overall size requirement for this antenna is 46 x 9 mm. Thus this is a compact, low cost, and high performance antenna. Since the impedance of the folded dipole is matched directly to the impedance of the MCU radio, no external matching components are needed. Depending on which regulatory limits the application should comply with, two filtering capacitors might however be needed. Folded antenna dimension:

Fig 3.7.1- Folded Antenna PCB

Fig 3.7.2- Folded Antenna (1:1 proportion Diagram)

Fig 3.7.3- Folded Antenna Dimensions

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3.8 Keyboard
Keyboard is provided on the Clicker device, which is used for responding to questions.

Fig 3.8- Clicker Keyboard Functions of keysAlphanumeric Keys Alphanumeric keys in the Clicker Keyboard include 0 to 9 numbers and A, B, C, D, E, and F alphabets. Alphanumeric keys are used to respond to general, multiple answer, and numeric answer question. Decimal Key (.) Decimal key is used for responding to question having fractional or decimal answers like 3.14, 2.718, etc. Clr Clr key is used for canceling entered entry in the clicker device. OK OKkey is used for confirming the actions. OK key is also used for waking up clicker from sleep mode. T/Y T/Y key is used for responding answer as True or Yes. F/N F/N key is used for responding answer as False or No. Left Left key is used for moving cursor to the left hand side. Right Right key is used for moving cursor to the Right hand side. Raise Hand
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Raise Hand key is used for raising a query to the instructor.

Clicker Device External Interface

Fig: - Clicker device external interface

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Annexure PCB layout Graphics

Fig- Frontline graphics of Clicker PCB (Drill Drawing) PCB Size = 1056 mm PCB material frame = 0.8 mm

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Fig- Frontline graphics of Clicker PCB (After Drilling) PCB Size = 11056 mm
PCB material frame = 0.8 mm
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Fig- Frontline graphics of Clicker PCB (Soldermask top) PCB Size = 11056 mm
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PCB material frame = 0.8 mm

Fig- Frontline graphics of Clicker PCB (Soldermask bottom) PCB Size = 11056 mm
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PCB material frame = 0.8 mm

Fig- Frontline graphics of Clicker PCB (Silkscreen bottom) PCB Size = 11056 mm
PCB material frame = 0.8 mm
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Fig- Frontline graphics of Clicker PCB (Silkscreen top) PCB Size = 11056 mm
PCB material frame = 0.8 mm
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Components of the Clicker hardware:

3.1 CC2511 Low-Power SoC with MCU, Memory, 2.4 GHz RF Transceiver, and USB Controller: The CC2510Fx/CC2511Fx is a true low-cost 2.4 GHz system-on-chip (SoC) designed for low power wireless applications. The CC2510Fx/CC2511Fx combines the excellent performance of the state-of-the-art RF transceiver CC2500 with an industry-standard enhanced 8051 MCU, up to 32 kB of in-system programmable flash memory and 4 kB of RAM, and many other powerful features. The small 6x6 mm package makes it very suitable for applications with size limitations. The CC2510Fx/CC2511Fx is highly suitable for systems where very low power consumption is required. This is ensured by several advanced low-power operating modes. The CC2511Fx adds a full-speed USB controller to the feature set of the CC2510Fx. Interfacing to a PC using the USB interface is quick and easy, and the high data rate (12 Mbps) of the USB interface avoids the bottlenecks of RS232 or low-speed USB interfaces. Key Features of CC2511Radio High-performance RF transceiver based on the market-leading CC2500 Excellent receiver selectivity and blocking performance High sensitivity (103 dBm at 2.4 kBaud) Programmable data rate up to 500 kBaud Programmable output power up to 1 dBm for all supported frequencies Frequency range: 2400 - 2483.5 MHz Digital RSSI / LQI support Current Consumption Low current consumption (RX: 17.1 mA @ 2.4 kBaud, TX: 16 mA @ 6 dBm output power) 0.3 A in PM3 (the operating mode with the lowest power consumption) MCU, Memory, and Peripherals High performance and low power 8051 microcontroller core. 8/16/32 kB in-system programmable flash, and 1/2/4 kB RAM Full-Speed USB Controller with 1 kB USB FIFO (CC2511Fx ) I2S interface 7 - 12 bit ADC with up to eight inputs 128-bit AES security coprocessor Powerful DMA functionality Two USARTs 16-bit timer with DSM mode Three 8-bit timers Hardware debug support 21 (CC2510Fx ) or 19 (CC2511Fx ) GPIO pins General Wide supply voltage range (2.0V - 3.6V) Green package: RoHS compliant and no antimony or bromine, 6x6mm QFN 36
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Pin-out description of CC2511:

Fig 3.1.1- Pin-out description of CC2511

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Block diagram of CC2511:

Fig 3.1.2- Block Diagram of CC2511

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3.2 TPS79333 ULTRALOW-NOISE, HIGH PSRR, FAST RF 200mA LOW-DROPOUT LINEAR REGULATORS: The TPS793xx family of low-dropout (LDO) low-power linear voltage regulators features high power-supply rejection ratio (PSRR), ultralow-noise, fast start-up, and excellent line and load transient responses in NanoStar wafer chip scale and SOT23 packages. NanoStar packaging gives an ultrasmall footprint as well as an ultralow profile and package weight, making it ideal for portable applications such as handsets and PDAs. Each device in the family is stable, with a small 2.2F tantalum capacitor on the output. The TPS793xx family uses an advanced, proprietary BiCMOS fabrication process to yield extremely low dropout voltages (for example, 112mV at 200mA, TPS79330). Each device achieves fast start-up times (approximately 50s with a 0.001F bypass capacitor) while consuming very low quiescent current (170A typical). Moreover, when the device is placed in standby mode, the supply current is reduced to less than 1A. The TPS79328 exhibits approximately 32VRMS of output voltage noise at 2.8V output with a 0.1F bypass capacitor. Applications with analog components that are noise-sensitive, such as portable RF electronics, benefit from the high PSRR and low-noise features as well as the fast response time. Features: 200mA RF Low-Dropout Regulator with Enable Available in Fixed Voltage Versions from 1.8V to 4.75V and Adjustable (1.22V to 5.5V) High PSRR (70dB at 10 kHz) Ultralow-Noise Fast Start-Up Time (50s) Stable With a 2.2F tantalum Capacitor Excellent Load/Line Transient Response Very Low Dropout Voltage 5- and 6-Pin SOT23 (DBV) and NanoStar Wafer Chip Scale (YEQ, YZQ) Packages

TPS79333 Adjustable LDO Regulator:

Fig 3.2.1- TPS79301 Adjustable LDO Regulator

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Fig 3.2.2 - TPS79301 Adjustable LDO Regulator package

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3.3 PCF8593S Low power clock/ Calendar:

The PCF8593 is a CMOS clock/calendar circuit, optimized for low power consumption. Addresses and data are transferred serially via the two-line bidirectional I2C-bus. The built-in word address register is incremented automatically after each written or read data byte. The built-in 32.768 kHz oscillator circuit and the first 8 bytes of RAM are used for the clock/calendar and counter functions. The next 8 bytes may be programmed as alarm registers, or used as free RAM space. FEATURES I2C-bus interface operating supply voltage: 2.5 to 6.0 V Clock operating supply voltage (Tamb = 0 to +70 C):1.0 to 6.0 V 8 bytes scratchpad RAM (when alarm not used) Data retention voltage: 1.0 to 6.0 V External RESET input resets I2C interface (only) Operating current (fscl = 0 Hz, 32 kHz time base, VDD = 2.0 V): typ. 1 mA Clock function with four year calendar Universal timer with alarm and overflow indication 24 or 12 hour format 32.768 kHz or 50 Hz time base Serial input/output bus (I2C-bus) Automatic word address incrementing Programmable alarm, timer, and interrupt function Space-saving SO8 package available Slave address: READ A3 WRITE A2. Pin Configuration:

Fig 3.3.2- Pin Configuration of PCF8593S

Block Diagram:
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Fig 3.3.1- Block Diagram of PCF8593S Pin Description:

3.4 MAX 3232 3.0V to 5.5V, Low-Power, up to 1Mbps, True RS-232 Transceivers:
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The MAX3222/MAX3232/MAX3237/MAX3241 transceivers have a proprietary lowdropout transmitter output stage enabling true RS-232 performance from a 3.0V to 5.5V supply with a dual charge pump. The devices require only four small 0.1F external charge pump capacitors. The MAX3222, MAX3232, and MAX3241 are guaranteed to run at data rates of 120kbps while maintaining RS-232 output levels. The MAX3237 is guaranteed to run at data rates of 250kbps in the normal operating mode and 1Mbps in the Mega Baud operating mode, while maintaining RS232 output levels. The MAX3222/MAX3232 have 2 receivers and 2 drivers. The MAX3222 features a 1A shutdown mode that reduces power consumption and extends battery life in portable systems. Its receivers remain active in shutdown mode, allowing external devices such as modems to be monitored using only 1A supply current. The MAX3222 and MAX3232 are pin, package, and functionally compatible with the industry-standard MAX242 and MAX232, respectively. The MAX3241 is a complete serial port (3 drivers/ 5 receivers) designed for notebook and subnotebook computers. The MAX3237 (5 drivers/3 receivers) is ideal for fast modem applications. Both these devices feature a shutdown mode in which all receivers can remain active while using only 1A supply current. Receivers R1 (MAX3237/MAX3241) and R2 (MAX3241) have extra outputs in addition to their standard outputs. These extra outputs are always active, allowing external devices such as a modem to be monitored without forward biasing the protection diodes in circuitry that may have VCC completely removed. The MAX3222, MAX3237, and MAX3241 are available in spacesaving TSSOP and SSOP packages. Pin Configuration:

Fig 3.4- MAX 3232 Pin Configuration

Pin description:
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3.5 AD8544 General Purpose CMOS Amplifier:

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The AD8541/AD8542/AD8544 are single, dual, and quad rail to- rail input and output singlesupply amplifiers featuring very low supply current and 1 MHz bandwidth. All are guaranteed to operate from a 2.7 V single supply as well as a 5 V supply. These parts provide 1 MHz band-width at a low current consumption of 45 A per amplifier. Very low input bias currents enable the AD8541/AD8542/AD8544 to be used for integrators, photodiode amplifiers, piezo electric sensors, and other applications with high source impedance. Supply current is only 45 A per amplifier, ideal for battery operation. Rail-to-rail inputs and outputs are useful to designers buffering ASICs in single-supply systems. The AD8541/AD8542/AD8544 are optimized to maintain high gains at lower supply voltages, making them useful for active filters and gain stages. The AD8541/AD8542/AD8544 are specified over the extended industrial temperature range (40 Degree Celsius to +125 Degree Celsius). The AD8541 is available in 8-lead SOIC, 5-lead SC70, and 5-lead SOT-23 packages. The AD8542 is available in 8-lead SOIC, 8-lead MSOP, and 8-lead TSSOP surface-mount packages. The AD8544 is available in 14-lead narrow SOIC and 14-lead TSSOP surface mount packages. All MSOP, SC70, and SOT versions are available in tape and reel only. Features: Single-Supply Operation: 2.7 V to 5.5 V Low Supply Current: 45 A/Amplifier Wide Bandwidth: 1 MHz No Phase Reversal Low Input Currents: 4 pA Unity Gain Stable Rail-to-Rail Input and Output Pin Configuration of AD8544:

Fig 3.5- AD8544 Pin configuration

3.6 16x2 LCD display:

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Fig 3.6.1 - LCD Display LCD (Liquid Crystal Display) screen is an electronic display module has been used in Clicker circuits. LCDs are economical; easily programmable; have no limitation of displaying special and even custom characters (unlike in seven segments), animations, and so on. A 16x2 LCD means it can display 16 characters per line and there are 2 such lines. In this LCD, each character is displayed in 5x7 pixel matrix. This LCD has two registers, namely, Command and Data. The command register stores the command instructions given to the LCD. A command is an instruction given to LCD to do a predefined task like initializing it, clearing its screen, setting the cursor position, controlling display, etc. The data register stores the data to be displayed on the LCD. The data is the ASCII value of the character to be displayed on the LCD.

LCD pin configuration:

Fig 3.6.2 - LCD pin Configuration

Pin Description:
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Pin No 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

Function Ground (0V) Supply voltage; 5V (4.7V 5.3V) Contrast adjustment; through a variable resistor Selects command register when low; and data register when high Low to write to the register; High to read from the register Sends data to data pins when a high to low pulse is given

Name Ground Vcc VEE Register Select Read/write Enable DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 Led+ Led-

8-bit data pins

Backlight VCC (5V) Backlight Ground (0V)

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