Active Load
Active Load
Active Load
Current source Ideal goal Small signal model: Open circuit RD=
Realizing current source: MOSFET Large signal nonideality: Compliance range Looks like current source only for VDS>Veff
MOSFET ID-VDS characteristic for fixed VGS Small-signal nonideality: slope in active region
SLOPE =
rDS(on) Triode region Large signal True resistance (V-I through origin)
Add rds in parallel with gmvgs current source at output SAME FOR N-ch, P-ch How to relate rds to DC operating point? Example: gm = 2ID/Veff
"Family" of curves
Intersect at -1/l
Slope:
1 ID 1 = rds = rds 1 l lI D
2I D gm = Veff
rds =
1 lI D
Increasing Gain Typical gain (resistive load) Lab 4 example: |av | 2 Class example: |av | 11.1 How to increase av?
Transconductance gm Definition
dID gm = dVGS
Summary of gm expressions All equivalent! choose whichever gives easier math Cant memorize? rederive from definition of gm
dID gm = dVGS
W2 gm = m nCox Veff L2 gm = 2I D Veff
W gm = 2mnCox ID L
Setting operating point: Adjusted function generator offset for DC output at midpoint of signal swing
Common source circuit (Lab 4) DC operating point Chosen for halfway between rails ID=1.25mA Veff 2.0V (depends on parameters)
VOUT = VDD - I D RD VOUT = +2.5V VDD - VOUT ID = RD 5V - 2.5V = = 1.25mA 2kW
Common source circuit (Lab 4) Small signal gain magnitude = 2.5 Not impressive!
gm = 2I D 2(1.25mA) = Veff 2.0V
av = gm RD
Increase RD New RD = 10k (5X old value) Problem: VOUT = VDD - I D RD DC operating point VOUT = 5V - (1.25mA)(10kW) 144 443 2 Violates condition for 12.5V active region: triode! V OUT = -7.5V ? DC operating point stuck at negative rail
Look at problem symbolically Use gm=2ID/Veff IDRD = DC drop on load Optimal bias at output: constrained to VDD / 2 ID, RD not involved!
2ID gm = Veff 2I R av = gm RD = D D Veff
VDD ID RD = 2 V av = DD Veff
Value of approximate symbolic approach vs. exact numerical results from simulation
How to increase gain (resistive load) increase VDD usually fixed by application, process decrease Veff does increase gm but ...
VDD av = Veff
Problems decreasing Veff Veff, W/L gm expression: W 2X increase in gm: gm = 2mnCox ID 4X increase in size L (cant increase IDRD) Increased area: cost penalty Increased capacitance speed penalty Veff < 200 mV: subthreshold region Not square law: gm expressions invalid
Increase av: Different approach Give up on resistive load ... What is highest resistance?
Increasing av: Different approach What is highest resistance? Infinite: open circuit Problem: no path for ID Any circuit element that: provides DC current, but is open circuit in small signal model?
Current source! Open in small signal model Realizing current source: MOSFET
Lab Circuit: MOSFET with active load Small signal model for M1 Thevenin equivalent looking into drain of M2 (see text sec. 3.1)
M1 common source
M2 Thevenin equivalent
Current source load: Large signal considerations Output swing limits Top: M2 crash into triode Bottom: M1 crash into triode
Determining DC Operating Point Active region: Veff determines ID Correct VIN: M1, M2 agree Example: Veff1 = 1.0V ID = 100 A
If DC bias at input is wrong? Current source "disagreement" KCL crisis at output: 2A, nowhere to go What happens?
If DC bias at input is wrong? Capacitance at output node Vout 2A flows into cap, charges up VDS1 increases I1 increases VDS2 decreases I1 decreases Changes in VDS cause changes in ID until agreement is reached: ID1 = ID2
How much change in VDS? Changes in VDS cause changes in ID until agreement is reached: ID1 = ID2 BUT Active region: ID is a weak function of VDS Large change in VDS for small change in ID Output very sensitive to changes in ID: Small Veff at input Small ID Requires large VDS at output for ID agreement Good: high voltage gain Bad: tricky to get correct input bias point
Frequency Domain Considerations Ideal op-amp goals: Infinite gain Infinite bandwidth Active load helps gain What about bandwidth?
Frequency Domain Analysis Start simple: Assume single CL at output (Ignore MOS capacitances for now ) Find transfer function vout/vin
Small signal gain: vout/vin = av = -gmZL Frequency dependence of ZL provides frequency dependence of transfer function
rout ZL = 1 + srout CL
Magnitude
vout gm rout = vin 1 + (wrout CL )2
3-dB Frequency / Bandwidth Frequency at which magnitude is 3 dB down (reduced by factor 1/2)
vout MAX = gm rout AT w = 0 vin vout 1 THEN AT w3dB, = gm rout vin 2 1 gmrout 1 gmrout = w 3dB = 2 2 routC L 1+ (w 3dBroutCL )
Unity Gain Frequency wT / Gain-Bandwidth Product wT : Frequency at which magnitude is 1 Use approximation wT >> 1/routCL
1= gm rout 1+ (wT rout CL )
2
gm rout
(wT rout CL )
gm wT = CL
av = gm rout
w 3dB
1 = rout CL
Summary: Active Load Active load DC considerations: Output swing limited by triode crash To voltage within Veff of rail Active load good news / bad news: Good news: high gain Bad news: very sensitive to input DC bias
Massage small signal gain result Small signal gain Look at parallel combination Substitute expression for rds
av = gm1( rds1 rds2 ) 1 rds1 rds 2 = 1 1 + rds1 rds2 1 rds1 rds 2 = l 1ID + l 2 ID 1 rds1 rds 2 = (l1 + l2 ) ID
Massage small signal gain result Small signal gain Substitute for gm, parallel rds ID drops out!
av = gm1( rds1 rds2 ) 2I 1 av = D Veff1 (l1 + l 2 )I D 4 4 { 1424 3
gm1 rds1 rds2
2 av = (l1 + l2 )Veff1
Improve Gain Reduce Veff Minimum 200 to 300mV (subthreshold) May not want to go that low (W,L too big) Reduce l1, l2 How? Where does l1 come from?
[ (
)]
I D -sat
[ (
)]
I D -sat
Fractional extra part is l(VDS-Veff) Meaning of l: Fractional change in current ID per volt change in VDS
What causes change? Where does l come from? Change in effective channel length L One way to reduce l: longer L Change L represents smaller fraction
After some semiconductor physics ... Definition of l Fractional change Semiconductor physics ... (see J&M p. 26)
l= DI D ID DVDS
DID DL = ID L l= 1 DL L DVDS 2KS e 0 1 qNSUB 2 VDS - Veff 2KS e 0 1 qNSUB 2 VDS - Veff
DL = DVDS l= 1 L
KS Silicon dielectric constant 11.8 NSUB Substrate doping units /cm3 Sanity check: 1E+14 to 1E+17 VDS from active-triode edge to large VDS Caution: consistent length units on L, NSUB, e0
Substrate doping NSUB parameter Needed for SPICE Extraction procedure: 1) Calculate slope from ID-VDS plot 2) rds = 1/slope (small signal model) 3) Calculate l 4) Calculate NSUB
1) Calculate slope from ID-VDS plot 2) rds = 1/slope (small signal model)
3) Calculate l
ID = 482 A
4) calculate NSUB
l=
VDS = 4.48 V
0.052V
For CD4007, L = 10m = 1.0E-5m VDS, Veff for largest VDS data point
Simulation exercise Add NSUB to N-channel, P-channel models DC sweep for CS Amplifier with Active Load
Common Source with Active Load (DC) Sweep input over full range 0 to +5V