Metallization Process Is Used in Interconn Desired
Metallization Process Is Used in Interconn Desired
Metallization Process Is Used in Interconn Desired
joined together on a single crystal chip of silicon. Classification: 1. Based on mode of operation a. Digital ICs b. Linear ICs Digital ICs: Digital ICs are complete functioning logic networks that are equivalents of basic transistor logic circuits. Ex:- gates ,counters, multiplexers, demultiplexers, shift registers. Linear ICs: Linear ICs are equivalents of discrete transistor networks, such as amplifiers, filters, frequency multipliers, and modulators that often require additional external components for satisfactory operation. Note: Of all presently available linear ICs, the majority are operational amplifiers. 2. Based on fabrication a. Monolithic ICs b. Hybrid ICs a. Monolithic ICs : In monolithic ICs all components (active and passive) are formed simultaneously by a diffusion process. Then a metallization process is used in interconnecting these components to form the desired circuit. b. Hybrid ICs: In hybrid ICs, passive components (such as resistors and capacitors) and the interconnections between them are formed on an insulating substrate. The substrate is used as a chassis for the integrated components. Active components such as transistors and diodes as well as monolithic integrated circuits, are then connected to form a complete circuit. 3. Based on number of components integrated on ICs a. SSI <10 components b. MSI <100 components c. LSI >100 components d. VLSI >1000 components Integrated circuit Package types: 1. The flat pack 2. The metal can or transistor pack 3. The dual in line package or DIP
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THE OPERATIONAL AMPLIFIER: An operational amplifier is a direct-coupled high-gain amplifier usually consisting of one or more differential amplifiers and usually followed by a level translator and an output stage. An operational amplifier is available as a single integrated circuit package. The operational amplifier is a versatile device that can be used to amplify dc as well as ac input signals and was originally designed for computing such mathematical functions as addition, subtraction, multiplication, and integration. Thus the name operational amplifier stems from its original use for these mathematical operations and is abbreviated to op-amp. With the addition of suitable external feedback components, the modern day op-amp can be used for a variety of applications, such as ac and dc signal amplification, active filters, oscillators, comparators, regulators, and others.
The basic amplifier used in Op-Amp is a differential amplifier. Differential amplifier Let us consider the emitter-biased circuit. Figure 1-1 shows two identical emitter biased circuits in that transistor Q1 has the same characteristics as transistor Q2, RE1= RE2, RC1 =RC2, and the magnitude of +VCC is equal to the magnitude of -VEE. Remember that the supply voltages +
+VCC and -VEE are measured with respect to ground. To obtain a single circuit such as the one in Figure 1-2, we should reconnect these two circuits as follows: 1. Reconnect +VCC supply voltages of the two circuits since the voltages are of the same polarity and amplitude. Similarly, reconnect -VEE supply voltages. 2. Reconnect the emitter E1 of transistor Q1 to the emitter E2 of transistor Q2. (This reconnection places RE1 in parallel with RE2) 3. Show the input signal vin1 applied to the base B1 of transistor Q1 and vin2 applied to the base B2 of transistor Q2. 4. Label the voltage between the collectors C1 and C2 as v0. (The v0 is the output voltage.)
DIFFERENTIAL AMPLIFIER CIRCUIT CONFIGURATIONS The four differential amplifier configurations are the following: 1. Dual-input, balanced-output differential amplifier 2. Dual-input, unbalanced-output differential amplifier 3. Single-input, balanced-output differential amplifier. 4. Single-input, unbalanced-output differential amplifier
The dc equivalent circuit can be obtained simply by reducing the input signals vin1 and vin2 to zero. To determine the operating point values ICQ and VCEQ,
AC Analysis: To perform ac analysis to derive the expression for the voltage gain Ad and the input resistance Ri of the differential amplifier shown in Figure 1-2: 1. Set the dc voltages + Vcc and -VEE at zero. 2. Substitute the small-signal T-equivalent models for the transistors.
Figure 1-4(a) shows the resulting ac equivalent circuit of the dual-input, balanced- output differential amplifier.
(a) Voltage gain: The following should be noted about the circuit in Figure 1-4(a): 1. IE1 =IE2; therefore, re1 = re2. For this reason, the ac emitter resistance of transistor Q1 and Q2 is simply denoted by re. 2. The voltage across each collector resistor is shown out of phase by 1800 with respect to the input voltages vin1 and vin2. This polarity assignment is in accordance with the common-emitter configuration. 3. Note the assigned polarity of the output voltage v0. This polarity simply indicates that the voltage at collector C2 is assumed to be more positive with respect to that at collector C1, even though both of them are negative with respect to ground.
(b) Differential input resistance. Differential input resistance is defined as the equivalent resistance that would be measured at either input terminal with the other terminal grounded.
(c) Output resistance. Output resistance is defined as the equivalent resistance that would be measured at either output terminal with respect to ground. Therefore, the output resistance R01 measured between collector C1 and ground is equal to that of the collector resistor RC. Similarly, the output resistance R02 measured at collector C2 with respect to ground is equal to that of the collector resistor Rc. Thus R01= R02 = RC FET DIFFERENTIAL AMPLIFIERS In the differential amplifier configurations just discussed we have used BJTs. But if we require very high input resistance, we can use FETs instead. Fortunately, the voltage-gain equations derived for these configurations using BJTs can also be used for configurations using FETs, except for the following replacements:
For instance, the voltage gain of the JFET dual-input, balanced-output differential amplifier obtained from Equation (1-12) is
LEVEL TRANSLATOR: From the results of the cascaded differential amplifier, the following observations can be made: 1. Because of the direct coupling, the dc level at the emitters rises from stage to stage. This increase in dc level tends to shift the operating point of the succeeding stages and, therefore, limits the output voltage swing and may even distort the output signal.. Therefore, the final stage should be included to shift the output dc level at the second stage down to about zero volts to ground. Such a stage is referred to as a level translator or shifter.
The voltage at the junction will be zero by selecting proper values of R1 and R2. Better results are obtained by using an emitter follower either with a diode constant current bias or a current mirror instead of the voltage divider, as shown in Figure 1-20(b) and (c), respectively.
The output stage is generally a push-pull or push-pull complementary-symmetry pair. Inverting and Non-inverting Inputs In the differential amplifier circuit the non-inverting input because a positive voltage vin1 acting alone produces a positive output voltage. This can be seen from voltage-gain equation (1-1 1). Similarly, the positive voltage vin2 alone produces a negative output voltage; hence vin2 is called the inverting input [see Equation (1-11)]. Consequently, the base terminal B1 to which vin1 is applied is referred to as the non-inverting input terminal, and the base terminal B2 is called the inverting input terminal. SCHEMATIC SYMBOL
THE IDEAL OP-AMP An ideal op-amp would exhibit the following electrical characteristics: 1. Infinite voltage gain A. 2. Infinite input resistance R, so that almost any signal source can drive it and there is no loading of the preceding stage. 3. Zero output resistance R, so that output can drive an infinite number of other devices. 4. Zero output voltage when input voltage is zero. 5. Infinite bandwidth so that any frequency signal from 0 to Hz can be amplified without attenuation. 6. Infinite common-mode rejection ratio so that the output common-mode noise voltage is zero. 7. Infinite slew rate so that output voltage changes occur simultaneously with input voltage changes.
Where A = large-signal voltage gain vid= difference input voltage v1= voltage at the non-inverting input terminal with respect to ground v2= voltage at the inverting terminal with respect to ground
OPEN-LOOP OP-AMP CONFIGURATIONS 1. Differential amplifier 2. Inverting amplifier 3. Non-inverting amplifier The Differential Amplifier
BLOCK DIAGRAM REPRESENTATION OF FEEDBACK CONF1GURA TIONS An op-amp that uses feedback is called a feedback amplifier. A closed-loop amplifier can be represented by using two blocks, one for an op-amp and another for a feedback circuit. There are four ways to connect these two blocks. These connections are classified according to whether the voltage or current is fed back to the input in series or in parallel, as follows: 1. Voltage-series feedback 2. Voltage-shunt feedback 3. Current-series feedback 4. Current-shunt feedback
VOLTAGE-SERIES FEEDBACK AMPLIFIER The schematic diagram of the voltage-series feedback amplifier is shown in Figure 4-2. The op-amp is represented by its schematic symbol, including its large-signal voltage gain A, and the feedback circuit is composed of two resistors, R1 and RF.
The circuit shown in Figure 4-2 is commonly known as a non-inverting amplifier with feedback (or closed-loop non-inverting amplifier) because it uses feedback, and the input signal is applied to the non-inverting input terminal of the op-amp.
where vin = input voltage vf= feedback voltage vid= difference input voltage
it will be performed by computing closed-loop voltage gain, input and output resistances, and the bandwidth.
Equation (4-3) is important because it shows that the gain of the voltage- series feedback amplifier is determined by the ratio of two resistors, RF, and R1 Another interesting result can be obtained from Equation (4-3). As defined previously, the gain of the feedback circuit (B) is the ratio of vf and v0. Referring to Figure 4-2, this gain is
Finally, the closed-loop voltage gain AF can be expressed in terms of open- loop gain A and feedback circuit gain B as follows. Rearranging Equation (4-2), we get
where AF = closed-loop voltage gain A = open-loop voltage gain B = gain of the feedback circuit AB = loop gain A one-line block diagram of Equation (4-6) is shown in Figure 4-3. This block diagram illustrates a standard form for representing a system with feedback and also indicates the relationship between different variables of the system. The block-diagram approach helps to simplify the analysis of complex closed-loop networks, particularly if they are composed of nonresistive feedback circuits.
Equation (4-7b) says that the voltage at the non-inverting input terminal of an op-amp is approximately equal to that at the inverting input terminal provided that A is very large. This concept is useful in the analysis of closed-loop op-amp circuits. For example, ideal closed-loop voltage gain Equation (4-3) can be obtained using the preceding results as follows. In the circuit of Figure 4-2,
Input Resistance with Feedback : Figure 4-4 shows a voltage-series feedback amplifier with the op-amp equivalent circuit. In this circuit Ri is the input resistance (open loop) of the op-amp, and RiF is the input resistance of the amplifier with feedback. The input resistance with feedback is defined as RiF=vin/iin =vin/(vid/Ri)
Output Resistance with Feedback : Output resistance is the resistance determined looking back into the feedback amplifier from the output terminal as shown in Figure 4-5. This resistance can be obtained by using Thevenins theorem for dependent sources. Specifically, to find output resistance with feedback RoF, reduce independent source vin to zero, apply an external voltage vo, and then calculate the resulting current io. In short, the R0F is defined as follows: RoF=vo/io
Bandwidth with Feedback : The bandwidth of an amplifier is defined as the band (range) of frequencies for which the gain remains constant.
The frequency at which the gain equals 1 is known as the unity gainbandwidth (UGB). The relationship between the break frequencyf0, open-loop voltage gain A, bandwidth with feedback fF, and the closed-loop gain AF can be established as follows. Since for an op-amp with a single break frequencyf0, the gain-bandwidth product is constant, and equal to the unity gain bandwidth (UGB), we can write,
Equation (4-lOd) indicates that the bandwidth of the noninverting amplifier with feedback,fF, is equal to its bandwidth without feedbackqf0, times (1 + AB). Total Output Offset Voltage with Feedback : In an op-amp when the input is zero, the output is also expected to be zero. However, because of the effect of input offset voltage and current, the output is significantly larger, a result in large part of very high open-loop gain. Since with feedback the gain of the non-inverting amplifier changes from A to A/(1 + AB) [Equation (4-6)1, the total output offset voltage with feedback must also be 1/(1 + AB) times the voltage without feedback. That is,
Voltage Follower : The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1. When the non-inverting amplifier is configured for unity gain, it is called a voltage follower because the output voltage is equal to and in phase with the input. In other words, in the voltage follower the output follows the input. Since the voltage follower is a special case of the non-inverting amplifier, all the formulas developed for the latter are indeed applicable to the former except that the gain of the feedback circuit is 1 (B =1). The applicable formulas are
The voltage follower is also called a non-inverting buffer because, when placed between two networks, it removes the loading on the first network. VOLTAGE-SHUNT FEEDBACK AMPLIFIER: Figure 4-8 shows the voltage-shunt feedback amplifier using an op-amp. The input voltage drives the inverting terminal, and the amplified as well as inverted output signal is also applied to the inverting input via the feedback resistor RF. This arrangement forms a negative feedback because any increase in the output signal results in a feedback signal into the inverting input, causing a decrease in the output signal.
Closed-Loop Voltage Gain : The closed-loop voltage gain AF of the voltage-shunt feedback amplifier can be obtained by writing Kirchhoffs current equation at the input node v2 (see Figure 4-8) as follows:
Since the internal gain A of the op-amp is very large (ideally infinity), AR1 >> R1 + RF. This means that Equation (4-13) can be rewritten as
This equation shows that the gain of the inverting amplifier is set by selecting a ratio of feedback resistance RF to the input resistance R1. Let us now rewrite Equation (4-13) in the feedback form of Equation (4-6), for a couple of reasons. First, it facilitates analysis of the inverting amplifier with feedback. Second, it helps compare and contrast inverting and non-inverting amplifier configurations, as we shall soon see. To begin with, we divide both numerator and denominator of Equation (4-13) by (R1 + RF):
A comparison of Equation (4-15) with the feedback Equation (4-6) indicates that, in addition to the phase inversion (-sign), the closed-loop gain of the inverting amplifier is K times the closedloop gain of the non-inverting amplifier, where K <1. The one-line block diagram of the inverting amplifier with feedback is shown in Figure 4-9. The reason for the block diagram is twofold: (1) to facilitate the analysis of the inverting amplifier, and (2) to express the performance equations in the same form as those for the non-inverting amplifier.
To derive the ideal closed-loop gain, we can use Equation (4-15) as follows. If AB>> 1, then (1+AB)= AB and
Inverting Input Terminal at Virtual Ground: Refer again to the inverting amplifier of Figure 4-8. In this figure, the non-inverting terminal is grounded, and the input signal is applied to the inverting terminal via resistor R1. The difference input voltage is ideally zero; that is, the voltage at the inverting terminal (v2,) is approximately equal to that at the non-inverting terminal (v1). In other words, the inverting terminal voltage v2 is approximately at ground potential. Therefore, the inverting terminal is said to be at virtual ground. This concept is extremely useful in the analysis of closed-loop inverting amplifier circuits. For example, ideal closed- loop gain Equation (4-14)1 can be obtained using the virtualground concept as follows:
Input Resistance with Feedback : The easiest method of finding the input resistance is to Millerize the feedback resistor RF; that is, split RF into its two Miller components as shown in Figure 4-10. In the circuit of Figure 4-10, the input resistance with feedback RiF=(R1+RF/(1+A))(Ri)
Output Resistance with Feedback : The output resistance with feedback RoF is the resistance measured at the output terminal of the feedback amplifier. The output resistance of the non-inverting amplifier was obtained by using Thevenins theorem, and we can do the same for the inverting amplifier. Thvenins equivalent circuit for R0F of the inverting amplifier is shown in Figure 4-11. Note that this Thvenins equivalent circuit is exactly the same as that for non-inverting amplifier (Figure 4-5) because the output resistance R0F of the inverting amplifier must be identical to that of the non-inverting amplifier [Equation (4-9b)].
Bandwidth with Feedback : As mentioned previously, the gain bandwidth product of a single break frequency op-amp is always constant.
Note that the VooT equation for the inverting amplifier is the same as that for the noninverting amplifier. This is because, when the input signal vin is reduced to zero, both inverting and noninverting amplifiers result in the same circuit. Current-to-voltage Converter: Let us reconsider the ideal voltage-gain Equation (4-14) of the inverting amplifier,
Inverter: If we need an output signal equal in amplitude but opposite in phase to that of the input signal, we can use the inverter. The inverting amplifier of Figure 4-8 works as an inverter if R1 = RF. Since the inverter is a special case of the inverting amplifier, all the equations developed for the inverting amplifier are also applicable here. The equations can be applied by merely substituting (A/2) for (1 + AB), since B = 1/2.
DIFFEREPETIA L AMPLIFIERS: 1. Differential amplifier with one op-amp 2. Differential amplifier with two op-amps 3. Differential amplifier with three op-amps Differential Amplifier with One Op-Amp Figure 4-14 shows the differential amplifier with one op-amp. We will analyze this circuit by deriving voltage gain and input resistance. A close examination of
Figure 4-14 reveals that differential amplifier is a combination of inverting and non-inverting amplifiers.
Voltage gain: The circuit in Figure 4-14 has two inputs, vx and vy; we will, therefore, use the superposition theorem in order to establish the relationship between inputs and output. When vy = 0 V. the configuration becomes an inverting amplifier; hence the output due to vx only is
Input resistance: The input resistance RiF of the differential amplifier is the resistance determined looking into either one of the two input terminals with the other grounded. Therefore, with vy = 0 V, the circuit in Figure 4-14 is an inverting amplifier the input resistance of which is RiFx =R1 Similarly, with vx=0 V. the differential amplifier of Figure 4-14 becomes a non-inverting amplifier whose input resistance can then be written as RiFy =R2+R3
Differential Amplifier with Two Op-Amps: Voltage gain: A close examination of the circuit of Figure 4-16 shows that it is composed of two stages: (1) the non-inverting amplifier, and (2) the differential amplifier with unequal gains. By finding the gain of these two stages, we can obtain the overall gain of the circuit as follows: The output vz of the first stage is
Input resistance: The input resistance RIF of the differential amplifier is the resistance determined looking into either one of the two non-inverting input terminals with the other grounded (see Figure 4-16). Note, however, that the first stage (A1) is a non-inverting amplifier; therefore [from Equation (4-8)j, its input resistance is
Differential Amplifier with Three Op-Amps: Voltage gain: The differential op-amp of Figure 4-17 consists of two stages. The first stage is composed of op-amps A1 and A2, while the second stage is formed by op-amp A3. Therefore, to find the overall voltage gain AD of the amplifier, the voltage gain of each stage must be determined. To begin with, the first stage can be viewed as two separate differential amplifiers, as shown in Figure 4-18. The output voltages of these differential amplifiers can be found by applying the superposition theorem. For Figure 4-18(a),
Input resistance: The input resistance RiF of the differential amplifier in Figure 4-17 is the same as the input resistance of the first stage, that is, the resistance determined at input vx and vy, looking into the circuit with the other terminal grounded. In Figure 4-18a, for instance, when vt, is reduced to zero, that is, when vy, is grounded, the circuit is a non-inverting amplifier. Applying the concepts developed for the non-inverting amplifier, the input resistance determined at input vx is
Similarly, the input resistance determined at input vy will be the same as that given in Equation (4-32).
DC and AC characteristics: DC characteristics of Op-Amp 1. INPUT OFFSET VOLTAGE Input offset voltage Vio is the differential input voltage that exists between two input terminals of an op-amp without any external inputs applied. In other words, it is the amount of the input voltage that should be applied between two input terminals in order to force the output voltage to zero. Let us denote the output offset voltage due to input offset voltage Vio as Voo. The output offset voltage Voo is caused by mismatching between two input terminals. Even though all the components are integrated on the same chip, it is not possible to have two transistors in the input differential amplifier stage with exactly the same characteristics. This means that the collector currents in these two transistors are not equal, which causes a differential output voltage from the first stage. The output of first stage is amplified by following stages and possibly aggravated by more mismatching in them.
Offset-Voltage Compensating Network Design The op-amp with offset-voltage compensating network is shown in Figure 5-3. The compensating network consists of potentiometer Ra and resistors Rb and Re.
To establish a relationship between Vio, supply voltages, and the compensating components, first Thevenize the circuit, looking back into Ra from point T. The maximum Thevenins equivalent resistance Rmax, occurs when the wiper is at the center of the Potentiometer, as shown in Figure.
Supply voltages VCC and -VEE are equal in magnitude therefore; let us denote their magnitude by voltage V. Thus Vmax= V.
where V2 has been expressed as a function of maximum Thevenins voltage Vmax and maximum Thevenins resistance, But the maximum value of V2 can be equal to Vio since V1 V2 = Vio. Thus Equation (5-1) becomes
Assume Rb > Rmax > Rc, where Rmax = Ra/4. Using this assumption Rmax+Rb+Rc=Rb Therefore
Let us now examine the effect of Vio in amplifiers with feedback. The non-inverting and inverting amplifiers with feedback are shown in Figure. To determine the effect of Vio, in each case, we have to reduce the input voltage vin to zero.
With vin reduced to zero, the circuits of both non-inverting and inverting amplifiers are the same as the circuit in Figure. The internal resistance Rin of the input signal voltage is negligibly small. In the figure, the non-inverting input terminal is connected to ground; therefore, assume voltage V1 at input terminal to be zero. The voltageV2 at the inverting input terminal can be determined by applying the voltage-divider rule:
Compensated non-inverting amplifier with feedback 2 .INPUT BIAS CURRENT An input bias cuent IB is defined as the average of the two input bias currents, IB1and IB2, as shown in Figure that is,
Obtaining the expression for the output offset voltage caused by the input bias current IB in the inverting and non-inverting amplifiers and then devise some scheme to eliminate or minimize it.
In the figure, the input bias currents 81 and 1 are flowing into the non-inverting and inverting input leads, respectively. The non-inverting terminal is connected to ground; therefore, the voltage V1 = 0 V. The controlled voltage source A Vio =0 V since Vio= 0 V is assumed. With output resistance Ro is negligibly small, the right end of RF is essentially at ground potential; that is, resistors R1, and RF are in parallel and the bias current I, flows through them. Therefore, the voltage at the inverting terminal is
CMRR
AC CHARACTERISTICS OF OP-AMP Two major sources are responsible for capacitive effects on op-amp.
SLEW RATE: It is the maximum rate of change of output voltage with respect to time,usually specified in V/s