Representation of Signed Numbers: 1. Sign-Magnitude (SM) Representation

SE(CIS) Batch 2009-10 CS-201
Lecture -09
Representation of Signed Numbers

Well investigate three schemes for representation of signed binary numbers: Sign-Magnitude 1s Complement 2s Complement 1. Sign-Magnitude (SM) Representation MSB is the sign bit (1 for negative and 0 for positive). Rest of the bits represents magnitude of the number. Examples: Decimal +6 6 +0 0 Whats the MOST negative integer using 8-bit SM notation? 1 1111111 = 127 Whats the MOST positive integer using 8-bit SM notation? 0 1111111 = +127 In general, the range supported by n-bit SM notation is (2n 1 1) to +(2n 1 1) Drawbacks Sign and magnitude bits should be differently treated in arithmetic operations. Addition and subtraction require different logic circuits. Overflow is difficult to detect. Zero has two different representations. Binary in Sign-Magnitude Notation 0110 1110 0000 1000
This scheme is therefore not employed in computing machines. 2. 1s Complement Representation Positive numbers have the same representation as in the SM notation. Negative Numbers To find the 1s complement representation of a number X, we first find SM representation of | X | and then take 1s complement of SM representation of | X |. 1s complement of a number is found by inverting all the bits. E.g. whats the 1s complement representation of 3? +3 = 0011 Take 1s complement 1100 = 3
Page 1 of 4
Lecture -09
Inverting bits results in negation of number. What does 1111 represent? Its definitely a negative number as suggested by the MSB. To find its magnitude, invert all the bits (i.e., take its 1s complement). 0000 Hence, 1111 represents 0. Theres one more representation of zero: +0 = 0000 This scheme, like SM representation, also suffers from two representations of zeros. Like SM notation, the range supported by n-bit 1s complement notation is (2n 1 1) to +(2n 1 1). Drawbacks This scheme is also not used in computing machines for the following reasons: Two representations of zeros. Complex arithmetic circuitry as explained under sign-magnitude representation.
3. 2s Complement Representation We need an approach that has unique representation for each number and results in simple arithmetic circuits. The 2s complement representation has these properties. One of its characteristics is that sign and magnitude bits are not treated separately. Positive numbers have the same representation as in the SM notation. The 2's complement of a binary number can be found using one of the following methods: Method 1 All the bits are inverted and a 1 is added in the least significant position. Method 2 The lowest order 1 (i.e. scanning from the right) in the given binary number is sensed, and all succeeding higher bits are inverted. Negative Numbers To find the 2s complement representation of a number X, we first find SM representation of | X | and then take 2s complement of SM representation of | X |. E.g. whats the 2s complement representation of 3? +3 = 0011 Take 2s complement 1101 = 3 Taking 2s complement negates a number What does 1111 represent? Its definitely a negative number as suggested by the MSB
Page 2 of 4
Lecture -09
To find its magnitude, take its 2complement 0001 Hence, 1111 represents 1 in 2s complement representation Theres rather a quick method to discover whats represented by a given 2s complement representation. Use the negative weight for the MSB and positive weights for the remaining bits as we do for ordinary binary numbers. Thus, 1111 = 1 x (-23) + 1 x 22 + 1 x 21 + 1 x 20 = -1 The range supported by n-bit 2s complement notation is 2n 1 to +(2n 1 1) Quite often we need to represent data in more bits than actually required. E.g. representing 410 in 2s complement notation requires 3 bits: 410 = 100 But, what if youve to represent it in 8-bits? This is easily accomplished through sign extension (repeating sign bit to the left of the number as many times as required). Thus, for our example: 410 = 100 = 11111110 It can be easily verified that sign extension has no effect on magnitude of number. Addition / Subtraction Addition/subtraction is quite straightforward in 2s complement representation. Consider the following examples to grasp the rules: 510 310 = ? This is equivalent to calculating 510 + ( 3)10 Represent both minuend and subtrahend in 2s complement notation and then perform addition. Assume 8-bit representation +510 = 00000101 310 = 11111101
End Around Carry (EAC) is ignored and hence theres no hassle unlike 1s complement and sign-magnitude notations. Another example:
Now use three bits to calculate 310 310

Page 3 of 4
Lecture -09
This is interesting: addition of two negative numbers has resulted in a positive number. This indicates an overflow as three bits arent enough to represent 6 in 2s complement notation. Lets see another example:
Here addition of two positive numbers has resulted in a negative number. This is also overflow as three bits arent enough to represent +6 in 2s complement notation. From the examples above, following overflow detection rule can be inferred: Overflow will happen in 2s complement addition/subtraction when the operands have the same sign but the sign of result differs from the sign of operands ******
Page 4 of 4

Representation of Signed Numbers: 1. Sign-Magnitude (SM) Representation

Uploaded by

Copyright:

Available Formats

Representation of Signed Numbers: 1. Sign-Magnitude (SM) Representation

Uploaded by

Document Information

Original Title

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

Representation of Signed Numbers: 1. Sign-Magnitude (SM) Representation

Uploaded by

Copyright:

Available Formats

SE(CIS) Batch 2009-10 CS-201